Re: [PATCH 2/2] ARM: dts: imx6qdl: phycore-som: Add custom volt/freq table

[sashiko-bot@kernel.org]

Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider:
- [High] dts: imx6dl: missing fsl,soc-operating-points violates hardware constraint
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commit a3b6d4e5af39862c78043d8917ba381472b78ee4
Author: Yunus Bas <y.bas@phytec.de>

    ARM: dts: imx6qdl: phycore-som: Add custom volt/freq table

The PHYTEC phyCORE-i.MX6QDL SOM-modules are operating with slightly different
voltage and frequency values. Introduce imx6q- and imx6dl-phycore dtsi files
with the modified power tables to achieve stable condition.

> diff --git a/arch/arm/boot/dts/nxp/imx/imx6dl-phytec-phycore-som.dtsi b/arch/arm/boot/dts/nxp/imx/imx6dl-phytec-phycore-som.dtsi
> new file mode 100644
> index 0000000000000..de85c084ac8d3
> --- /dev/null
> +++ b/arch/arm/boot/dts/nxp/imx/imx6dl-phytec-phycore-som.dtsi
> @@ -0,0 +1,23 @@
> +// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
> +/*
> + * Copyright (C) 2021 PHYTEC Messtechnik GmbH
> + * Author: Yunus Bas <y.bas@phytec.de>
> + */
> +
> +#include "imx6qdl-phytec-phycore-som.dtsi"
> +
> +&cpu0 {
> +	operating-points =
> +		/* kHz    uV */
> +		<996000 1275000>,
                ^^^^^^^^^^^^^^^^
[Severity: High]
This overrides the operating-points to increase VDD_ARM to 1.275V for the
996MHz tier, but lacks a corresponding fsl,soc-operating-points override.

Without it, VDD_SOC will inherit the default 1.175V from imx6dl.dtsi.

The NXP i.MX6 DualLite hardware datasheet specifies that VDD_ARM_IN must not
exceed VDD_SOC_IN by more than 50mV to prevent latch-up and instability.

Does this 100mV gap risk system instability or hardware damage by violating
this constraint? Note that the newly added imx6q-phytec-phycore-som.dtsi
correctly includes the fsl,soc-operating-points property.

> +		<792000 1175000>,
> +		<396000 1150000>;
> +};

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Sashiko AI review · https://sashiko.dev/#/patchset/20260923070505.494949-1-primoz.fiser@norik.com?part=2