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From: Yixun Lan <dlan@kernel.org>
To: Bo Gan <ganboing@gmail.com>
Cc: u-boot-spacemit@groups.io, u-boot@lists.u-boot-project.org,
	Eric Chung <eric.chung@riscstar.com>,
	Raymond Mao <raymond.mao@riscstar.com>,
	Junhui Liu <junhui.liu@pigmoral.tech>,
	Tom Rini <trini@konsulko.com>
Subject: Re: [PATCH 2/2] pinctrl: spacemit: k3: add K3 pin support
Date: Wed, 23 Sep 2026 08:46:41 +0000	[thread overview]
Message-ID: <20260923084641-GKC353745@kernel.org> (raw)
In-Reply-To: <bca35d47-5cae-4f2b-a03c-f18e310e7361@gmail.com>

Hi Bo Gan,

On 14:55 Thu 27 Aug     , Bo Gan wrote:
> Hi Yixun,
> 
> On 8/20/26 06:01, Yixun Lan wrote:
> > Based on upstream Linux:
> >    7412311c4655 ("pinctrl: spacemit: k3: add initial pin support")
> >    3f20bdf71518 ("pinctrl: spacemit: k3: adjust drive strength and schmitter trigger")
> > 
> > K3 uses a different pin-to-register mapping than K1, so add a
> > K3-specific pin_to_reg path and pin/IO power-domain tables. Drive
> > strength expands to 4 bits with larger mA tables, and the shared
> > pinctrl data gains per-SoC drive_mask and drive-strength tables so
> > K1 and K3 can live in the same driver.
> > 
> > Signed-off-by: Yixun Lan <dlan@kernel.org>
> > ---
> >   drivers/pinctrl/spacemit/Kconfig      |   4 +-
> >   drivers/pinctrl/spacemit/pinctrl-k1.c | 291 ++++++++++++++++++++++++++++++----
> >   2 files changed, 259 insertions(+), 36 deletions(-)
> > 
...
> > @@ -704,12 +700,239 @@ static const struct spacemit_pinctrl_data k1_pinctrl_data = {
> >   	.get_functions	= k1_get_functions,
> >   	.get_io_type	= k1_get_io_type,
> >   	.pin_to_io_pd_offset = spacemit_k1_pin_to_io_pd_offset,
> > +	.drive_mask	= PAD_DRIVE_K1,
> > +	.ds_1v8_tbl	= spacemit_ds_1v8_tbl,
> > +	.ds_1v8_tbl_num	= ARRAY_SIZE(spacemit_ds_1v8_tbl),
> > +	.ds_3v3_tbl	= spacemit_ds_3v3_tbl,
> > +	.ds_3v3_tbl_num	= ARRAY_SIZE(spacemit_ds_3v3_tbl),
> > +};
> > +
> 
> Can the following table be simplified using static function and switch
> cases? As your other series mentioned, the SPL has very strict size limit,
> so we'd better not define this huge data array.
> 
While actually looking into the implemenation, I end at giving up to
optimize it by using static function, it's much hard than I expected..
the io pin's information is per pin bias, and io voltage is dynamically
parsed from the DT property, which mean we actually need to allocate
each instance for all pins..

The optimization implenmation isn't critical, so I will leave it
unchanged for next version..

> > +static struct spacemit_pin_io k3_io_pins[] = {
> > +	{ 0, IO_TYPE_EXTERNAL, 0, },
> > +	{ 1, IO_TYPE_EXTERNAL, 0, },
> > +	{ 2, IO_TYPE_EXTERNAL, 0, },
> > +	{ 3, IO_TYPE_EXTERNAL, 0, },
> > +	{ 4, IO_TYPE_EXTERNAL, 0, },
> > +	{ 5, IO_TYPE_EXTERNAL, 0, },
....

-- 
Yixun Lan (dlan)

      parent reply	other threads:[~2026-09-23  8:46 UTC|newest]

Thread overview: 6+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-08-20 13:01 [PATCH 0/2] riscv: spacemit: add pinctrl support for K3 SoC Yixun Lan
2026-08-20 13:01 ` [PATCH 1/2] pinctrl: spacemit: configure drive strength based on power source Yixun Lan
2026-08-20 13:01 ` [PATCH 2/2] pinctrl: spacemit: k3: add K3 pin support Yixun Lan
2026-08-27 21:55   ` Bo Gan
2026-08-27 22:05     ` Yixun Lan
2026-09-23  8:46     ` Yixun Lan [this message]

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