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From: sashiko-bot@kernel.org
To: "Yureka Lilian" <yureka@cyberchaos.dev>
Cc: robh@kernel.org, conor+dt@kernel.org, devicetree@vger.kernel.org
Subject: Re: [PATCH 2/3] dts: apple: t8132: Fix ordering-related dt-check-style issues
Date: Thu, 24 Sep 2026 13:28:58 +0000	[thread overview]
Message-ID: <20260924132858.D79681F000FF@smtp.kernel.org> (raw)
In-Reply-To: <20260924-apple-dts-m4-dt-style-check-v1-2-3ec651d75baf@cyberchaos.dev>

Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider:
- [Low] dts: incorrect property sorting separates #address-cells and #size-cells
--

commit 9b49add5f860afd912c50de5f1749b0ac03afeeb
Author: Yureka Lilian <yureka@cyberchaos.dev>

dts: apple: t8132: Fix ordering-related dt-check-style issues

This commit fixes dt-check-style issues related to node and property
ordering in the t8132 device tree files. It also groups cache-related
properties for better readability.

> diff --git a/arch/arm64/boot/dts/apple/t8132.dtsi b/arch/arm64/boot/dts/apple/t8132.dtsi
> index 1ea488ce6e1c1..350ad7b3772b8 100644
> --- a/arch/arm64/boot/dts/apple/t8132.dtsi
> +++ b/arch/arm64/boot/dts/apple/t8132.dtsi
[ ... ]
>  	soc: soc {
>  		compatible = "simple-bus";
> -		#address-cells = <2>;
> -		#size-cells = <2>;
>  
>  		ranges;
> +		#address-cells = <2>;
>  		nonposted-mmio;
> +		#size-cells = <2>;

[Severity: Low]
In the soc node, does this alphabetical sorting inadvertently split tightly
coupled properties? The nonposted-mmio property now sits between #address-cells
and #size-cells, separating the pair which were kept together in the base
commit.

[ ... ]
> @@ -365,14 +379,15 @@ i2c4_pins: i2c4-pins {
>  		i2c0: i2c@3ad010000 {
>  			compatible = "apple,t8132-i2c", "apple,t8103-i2c";
>  			reg = <0x3 0xad010000 0x0 0x4000>;
> +
> +			#address-cells = <0x1>;
>  			clocks = <&clkref>;
>  			interrupt-parent = <&aic>;
>  			interrupts = <AIC_IRQ 1062 IRQ_TYPE_LEVEL_HIGH>;
>  			pinctrl-0 = <&i2c0_pins>;
>  			pinctrl-names = "default";
> -			#address-cells = <0x1>;
> -			#size-cells = <0x0>;
>  			power-domains = <&ps_i2c0>;
> +			#size-cells = <0x0>;

[Severity: Low]
Similar to the soc node, does alphabetical sorting in the i2c0 node scatter
these interdependent properties? Here #size-cells is pushed to the bottom of
the property block while #address-cells is moved to the top.

-- 
Sashiko AI review · https://sashiko.dev/#/patchset/20260924-apple-dts-m4-dt-style-check-v1-1-3ec651d75baf@cyberchaos.dev?part=2

  reply	other threads:[~2026-09-24 13:29 UTC|newest]

Thread overview: 5+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-09-24 13:22 [PATCH 0/3] arm64: dts: apple: dt-check-style strict fixes for Apple M4 Yureka Lilian
2026-09-24 13:22 ` [PATCH 1/3] dts: apple: t8132: Fix blank-lines-related dt-check-style issues Yureka Lilian
2026-09-24 13:22 ` [PATCH 2/3] dts: apple: t8132: Fix ordering-related " Yureka Lilian
2026-09-24 13:28   ` sashiko-bot [this message]
2026-09-24 13:22 ` [PATCH 3/3] dts: apple: t8132: Fix some line-length-related " Yureka Lilian

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