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From: "Philippe Mathieu-Daudé" <philmd@oss.qualcomm.com>
To: qemu-devel@nongnu.org
Subject: [PULL 17/18] target/i386: Use an acquire load for interrupt_request()
Date: Thu, 24 Sep 2026 17:23:52 +0200	[thread overview]
Message-ID: <20260924152353.36209-18-philmd@oss.qualcomm.com> (raw)
In-Reply-To: <20260924152353.36209-1-philmd@oss.qualcomm.com>

x86_cpu_has_work() may run without the BQL, but currently reads
CPUState::interrupt_request directly. Other threads update this
field with qatomic_or() in cpu_set_interrupt(), so the direct
read races with an atomic access.

Load the interrupt request with qatomic_load_acquire(), matching
cpu_test_interrupt(). This provides the acquire ordering required
before x86_cpu_pending_interrupt() inspects the CPU state.

Suggested-by: Paolo Bonzini <pbonzini@redhat.com>
Signed-off-by: Philippe Mathieu-Daudé <philmd@oss.qualcomm.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20260923171116.31276-18-philmd@oss.qualcomm.com>
---
 target/i386/cpu.c | 4 +++-
 1 file changed, 3 insertions(+), 1 deletion(-)

diff --git a/target/i386/cpu.c b/target/i386/cpu.c
index b97f144aea5..f3bc6911c10 100644
--- a/target/i386/cpu.c
+++ b/target/i386/cpu.c
@@ -10640,7 +10640,9 @@ int x86_cpu_pending_interrupt(const CPUState *cs, int interrupt_request)
 
 static bool x86_cpu_has_work(CPUState *cs)
 {
-    return x86_cpu_pending_interrupt(cs, cs->interrupt_request) != 0;
+    uint32_t pending_interrupts = qatomic_load_acquire(&cs->interrupt_request);
+
+    return x86_cpu_pending_interrupt(cs, pending_interrupts) != 0;
 }
 #endif /* !CONFIG_USER_ONLY */
 
-- 
2.53.0



  parent reply	other threads:[~2026-09-24 15:27 UTC|newest]

Thread overview: 20+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-09-24 15:23 [PULL 00/18] Misc target/ patches for 2026-09-24 Philippe Mathieu-Daudé
2026-09-24 15:23 ` [PULL 01/18] target/mips: Fix zero in gen_mxu_d8sum Philippe Mathieu-Daudé
2026-09-24 15:23 ` [PULL 02/18] target/mips: Drop zero optimization in gen_mxu_s32mul Philippe Mathieu-Daudé
2026-09-24 15:23 ` [PULL 03/18] target/mips: Split out gen_mxu_logic Philippe Mathieu-Daudé
2026-09-24 15:23 ` [PULL 04/18] target/mips: Use gen_mxu_logic for gen_mxu_S32MAX_S32MIN Philippe Mathieu-Daudé
2026-09-24 15:23 ` [PULL 05/18] target/mips: Use gen_mxu_logic for gen_mxu_S32SLT Philippe Mathieu-Daudé
2026-09-24 15:23 ` [PULL 06/18] target/mips: Use gen_mxu_logic for gen_mxu_S32CPS Philippe Mathieu-Daudé
2026-09-24 15:23 ` [PULL 07/18] target/riscv: Stub out kvm functions Philippe Mathieu-Daudé
2026-09-24 15:23 ` [PULL 08/18] system: Document has_work() synchronization requirements Philippe Mathieu-Daudé
2026-09-24 15:23 ` [PULL 09/18] target/s390x: Use s390_cpu_get_state() consistently Philippe Mathieu-Daudé
2026-09-24 15:23 ` [PULL 10/18] target/s390x: Extend comment about PV cpu load state Philippe Mathieu-Daudé
2026-09-24 15:23 ` [PULL 11/18] target/s390x: Make s390_cpu_set_state() return void Philippe Mathieu-Daudé
2026-09-24 15:23 ` [PULL 12/18] target/s390x: Use S390CpuState for CPU state APIs Philippe Mathieu-Daudé
2026-09-24 15:23 ` [PULL 13/18] target/s390x: Access S390CpuState atomically Philippe Mathieu-Daudé
2026-09-24 15:23 ` [PULL 14/18] target/arm: Un-inline arm_set_cpu_power_state() Philippe Mathieu-Daudé
2026-09-24 15:23 ` [PULL 15/18] target/arm: Access PSCI state atomically Philippe Mathieu-Daudé
2026-09-24 15:23 ` [PULL 16/18] target/arm: Access halt " Philippe Mathieu-Daudé
2026-09-24 15:23 ` Philippe Mathieu-Daudé [this message]
2026-09-24 15:23 ` [PULL 18/18] target/ppc: Stop vCPU thread before calling parent_unrealize Philippe Mathieu-Daudé
2026-09-25  2:35 ` [PULL 00/18] Misc target/ patches for 2026-09-24 Richard Henderson

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