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[88.187.86.199]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-49fe5cd4271sm114985825e9.5.2026.09.24.08.24.48 for (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Thu, 24 Sep 2026 08:24:49 -0700 (PDT) From: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Subject: [PULL 04/18] target/mips: Use gen_mxu_logic for gen_mxu_S32MAX_S32MIN Date: Thu, 24 Sep 2026 17:23:39 +0200 Message-ID: <20260924152353.36209-5-philmd@oss.qualcomm.com> X-Mailer: git-send-email 2.53.0 In-Reply-To: <20260924152353.36209-1-philmd@oss.qualcomm.com> References: <20260924152353.36209-1-philmd@oss.qualcomm.com> MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-Proofpoint-ORIG-GUID: -upKQelahWpiLYbADJaFoL2t_iGkmRQg X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwOTI0MDA2MyBTYWx0ZWRfX3Y5qUE0DLwmQ ZW+96TutKhWiOYXb4bMhYgemlyTx8LFq28A6LWnSWWcP8dMZ6nsVPgsL0CCSn/aN9CtMrkzoMUa fHATBhzg3xQlUgpj0WucW2gEKbg9jjCgZKX9pxuJT5/EcVAwxK4LjMSeO+EH3S+uVthSEway5b3 2I7yWvsp2kQ1sHSd0H2e0NsT0B6BjFS96+3a0+hxxotjK4lPxrF6mGsL8vJCGBALwafvPAWELTc 2AWzG9sj/Vko6hwVB3d4IuC8sVEOC9MuelFOpEEpMhA4DBeYr0ZvAuhy+m2nRPOonlCEPA49J6X 28VXyjGKmsoRDQVKjKLVXAfP7FxxFMQzAVn9ity+KKoaIFSbGry+6G9WCviwZKYwM+Er6cL5wN7 q0tNk9quY1sx4FLSmfHk9d+FAcXIurzupoKkiGDIAb7iDG944lziVKuBJuOlHCyUzQftAgZZaKw TDjWJ134Zwp34dkDT3g== X-Authority-Analysis: v=2.4 cv=cK11IVeN c=1 sm=1 tr=0 ts=6ab540c4 cx=c_pps a=N1BjEkVkxJi3uNfLdpvX3g==:117 a=4s3hRJSeHn4rkQlkrse1kQ==:17 a=IkcTkHD0fZMA:10 a=VdqzKS8jKosA:10 a=M51BFTxLslgA:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=u7WPNUs3qKkmUXheDGA7:22 a=_glEPmIy2e8OvE2BGh3C:22 a=KKAkSRfTAAAA:8 a=EUspDBNiAAAA:8 a=Aj8ARz31FktZ6VJZM80A:9 a=3ZKOabzyN94A:10 a=QEXdDO2ut3YA:10 a=crWF4MFLhNY0qMRaF8an:22 a=cvBusfyB2V15izCimMoJ:22 X-Proofpoint-GUID: -upKQelahWpiLYbADJaFoL2t_iGkmRQg X-Proofpoint-Spam-Info: AW1haW4tMjYwOTI0MDA2MyBTYWx0ZWRfX9Gb7TInHrIUY 5sQqHzgQwKH0+grpZWxvI4kHDAf1wgn+eQDagBQNlLz6W/QnoEOVgYXUVcKxpHIPF01V0EMO9NC VzMDJ9ZPPAOVaSkOIQvgEVL/PL4yAP4= X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1176,Hydra:6.1.134,FMLib:17.12.100.49 definitions=2026-09-24_03,2026-09-21_02,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 suspectscore=0 lowpriorityscore=0 bulkscore=0 priorityscore=1501 impostorscore=0 spamscore=0 malwarescore=0 phishscore=0 adultscore=0 clxscore=1015 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2609040000 definitions=main-2609240063 Received-SPF: pass client-ip=205.220.180.131; envelope-from=philmd@oss.qualcomm.com; helo=mx0b-0031df01.pphosted.com X-Spam_score_int: -27 X-Spam_score: -2.8 X-Spam_bar: -- X-Spam_report: (-2.8 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_LOW=-0.7, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org From: Richard Henderson Split S32MAX, S32MIN to separate functions. Fixes a bug in that "0" was passed in one of the zero reg cases, aka NULL, instead of a proper zero constant. Signed-off-by: Richard Henderson Reviewed-by: Philippe Mathieu-Daudé Message-ID: <20260914230901.1781309-5-richard.henderson@linaro.org> Signed-off-by: Philippe Mathieu-Daudé --- target/mips/tcg/mxu_translate.c | 47 +++++++-------------------------- 1 file changed, 9 insertions(+), 38 deletions(-) diff --git a/target/mips/tcg/mxu_translate.c b/target/mips/tcg/mxu_translate.c index 3f8acfcdb8f..4b2c264f031 100644 --- a/target/mips/tcg/mxu_translate.c +++ b/target/mips/tcg/mxu_translate.c @@ -2045,45 +2045,14 @@ static void gen_mxu_q16sxxv(DisasContext *ctx, bool right, bool arithmetic) * Update XRa with the minimum of signed 32-bit integers contained * in XRb and XRc. */ -static void gen_mxu_S32MAX_S32MIN(DisasContext *ctx) +static void gen_mxu_S32MAX(DisasContext *ctx) { - uint32_t pad, opc, XRc, XRb, XRa; + gen_mxu_logic(ctx, tcg_gen_smax_i32); +} - pad = extract32(ctx->opcode, 21, 5); - opc = extract32(ctx->opcode, 18, 3); - XRc = extract32(ctx->opcode, 14, 4); - XRb = extract32(ctx->opcode, 10, 4); - XRa = extract32(ctx->opcode, 6, 4); - - if (unlikely(pad != 0)) { - /* opcode padding incorrect -> do nothing */ - } else if (unlikely(XRa == 0)) { - /* destination is zero register -> do nothing */ - } else if (unlikely((XRb == 0) && (XRc == 0))) { - /* both operands zero registers -> just set destination to zero */ - tcg_gen_movi_i32(mxu_gpr[XRa - 1], 0); - } else if (unlikely((XRb == 0) || (XRc == 0))) { - /* exactly one operand is zero register - find which one is not...*/ - uint32_t XRx = XRb ? XRb : XRc; - /* ...and do max/min operation with one operand 0 */ - if (opc == OPC_MXU_S32MAX) { - tcg_gen_smax_i32(mxu_gpr[XRa - 1], mxu_gpr[XRx - 1], 0); - } else { - tcg_gen_smin_i32(mxu_gpr[XRa - 1], mxu_gpr[XRx - 1], 0); - } - } else if (unlikely(XRb == XRc)) { - /* both operands same -> just set destination to one of them */ - tcg_gen_mov_i32(mxu_gpr[XRa - 1], mxu_gpr[XRb - 1]); - } else { - /* the most general case */ - if (opc == OPC_MXU_S32MAX) { - tcg_gen_smax_i32(mxu_gpr[XRa - 1], mxu_gpr[XRb - 1], - mxu_gpr[XRc - 1]); - } else { - tcg_gen_smin_i32(mxu_gpr[XRa - 1], mxu_gpr[XRb - 1], - mxu_gpr[XRc - 1]); - } - } +static void gen_mxu_S32MIN(DisasContext *ctx) +{ + gen_mxu_logic(ctx, tcg_gen_smin_i32); } /* @@ -4328,8 +4297,10 @@ static void decode_opc_mxu__pool00(DisasContext *ctx) switch (opcode) { case OPC_MXU_S32MAX: + gen_mxu_S32MAX(ctx); + break; case OPC_MXU_S32MIN: - gen_mxu_S32MAX_S32MIN(ctx); + gen_mxu_S32MIN(ctx); break; case OPC_MXU_D16MAX: case OPC_MXU_D16MIN: -- 2.53.0