[PATCH v5 0/7] hw/riscv: Add support for Milk-V Duo board

[Kuan-Wei Chiu <visitorckw@gmail.com>]

Add initial support for the Milk-V Duo board.

The Sophgo CV1800B SoC features T-Head C906 processing, standard PLIC
and CLINT controllers, a dw8250 uart, and basic clock control. The
current implementation can successfully run OpenSBI and boot Linux v7.0
from an SD card to the Linux shell.
---
Changes in v5:
- Rebase on master branch.
- dw8250: Split MAINTAINERS entry into a standalone section.
- cv1800b_clk: Use sizeof(uint32_t) for REG_BYTE_WIDTH, check bounds
               against CV1800B_CLK_IOSIZE, and log guest errors on
               out-of-bounds accesses.
- boot test: Switch assets from personal github repo to tuxboot.

Changes in v4:
- dw8250: Fix memory access sizes, handle dynamic 'regshift', log
          unimplemented writes, and propagate errors.
- cv1800b_clk: Replace magic numbers with macros and sizeof().
- cv1800b: Move static properties and child device initialization to
           instance_init and propagate errp.
- milkv_duo: Use riscv_default_firmware_name(), riscv_load_fdt(), and
             DEFINE_TYPES().
- docs: Add a doc for milk-v duo board.
- tests: Add an end to end boot test.

Changes in v3:
- Rebase on master branch.
- Drop custom T-Head PMU CSR patch to avoid duplication.
- Use REG_BYTE_WIDTH macro in clock controller.

Changes in v2:
- Added link for the custom T-Head PMU CSRs
- Added qtest to validate basic for the dw8250 and clock controller.
- Removed RFC tag.

Kuan-Wei Chiu (7):
  hw/char: Add dw8250 UART
  hw/misc: Add Sophgo CV1800B clock controller
  hw/riscv: Add Sophgo CV1800B SoC support
  hw/riscv: Add Milk-V Duo board support
  tests/qtest: Add qtest for Milk-V Duo board
  tests/functional/riscv64:  Add boot test for Milk-V Duo board
  docs/system/riscv: Add Milk-V Duo board documentation

 MAINTAINERS                                 |  18 ++
 configs/devices/riscv64-softmmu/default.mak |   1 +
 docs/system/riscv/milkv-duo.rst             |  49 ++++++
 docs/system/target-riscv.rst                |   1 +
 hw/char/Kconfig                             |   4 +
 hw/char/dw8250.c                            | 131 +++++++++++++++
 hw/char/meson.build                         |   1 +
 hw/misc/Kconfig                             |   3 +
 hw/misc/cv1800b_clk.c                       |  98 +++++++++++
 hw/misc/meson.build                         |   1 +
 hw/riscv/Kconfig                            |  14 ++
 hw/riscv/cv1800b.c                          | 177 ++++++++++++++++++++
 hw/riscv/meson.build                        |   3 +
 hw/riscv/milkv_duo.c                        | 118 +++++++++++++
 include/hw/char/dw8250.h                    |  27 +++
 include/hw/misc/cv1800b_clk.h               |  26 +++
 include/hw/riscv/cv1800b.h                  |  56 +++++++
 tests/functional/riscv64/meson.build        |   1 +
 tests/functional/riscv64/test_milkv_duo.py  |  53 ++++++
 tests/qtest/meson.build                     |   3 +-
 tests/qtest/milkv-duo-test.c                |  70 ++++++++
 21 files changed, 854 insertions(+), 1 deletion(-)
 create mode 100644 docs/system/riscv/milkv-duo.rst
 create mode 100644 hw/char/dw8250.c
 create mode 100644 hw/misc/cv1800b_clk.c
 create mode 100644 hw/riscv/cv1800b.c
 create mode 100644 hw/riscv/milkv_duo.c
 create mode 100644 include/hw/char/dw8250.h
 create mode 100644 include/hw/misc/cv1800b_clk.h
 create mode 100644 include/hw/riscv/cv1800b.h
 create mode 100755 tests/functional/riscv64/test_milkv_duo.py
 create mode 100644 tests/qtest/milkv-duo-test.c

-- 
2.56.0.rc1.315.gc6ed9934b7-goog