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[35.194.223.33]) by smtp.gmail.com with ESMTPSA id 98e67ed59e1d1-3a0c719f86fsm13932737a91.7.2026.09.27.13.13.59 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 27 Sep 2026 13:14:05 -0700 (PDT) From: Kuan-Wei Chiu To: pierrick.bouvier@oss.qualcomm.com, palmer@dabbelt.com, alistair.francis@wdc.com, pbonzini@redhat.com, marcandre.lureau@redhat.com, farosas@suse.de, lvivier@redhat.com Cc: liwei1518@gmail.com, daniel.barboza@oss.qualcomm.com, zhiwei_liu@linux.alibaba.com, chao.liu@processmission.com, portias@oss.tenstorrent.com, wxchen0913@gmail.com, jserv@ccns.ncku.edu.tw, marscheng@google.com, eleanor15x@gmail.com, qemu-devel@nongnu.org, qemu-riscv@nongnu.org, Kuan-Wei Chiu , Chao Liu Subject: [PATCH v5 4/7] hw/riscv: Add Milk-V Duo board support Date: Sun, 27 Sep 2026 20:13:23 +0000 Message-ID: <20260927201326.650943-5-visitorckw@gmail.com> X-Mailer: git-send-email 2.56.0.rc1.315.gc6ed9934b7-goog In-Reply-To: <20260927201326.650943-1-visitorckw@gmail.com> References: <20260927201326.650943-1-visitorckw@gmail.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Received-SPF: pass client-ip=2607:f8b0:4864:39::f; envelope-from=visitorckw@gmail.com; helo=mail-pj2-x0f.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_FROM=0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Add support for the Milk-V Duo development board, which is powered by the Sophgo CV1800B SoC. The implementation includes: - Board-level machine initialization with 64mb of default ram. - Integration of the CV1800B SoC. - Support for loading external FDT, kernel, and initrd images. - Proper setup of the reset vector to match the CV1800B's boot flow. Signed-off-by: Kuan-Wei Chiu Acked-by: Alistair Francis Reviewed-by: Chao Liu --- MAINTAINERS | 9 ++ configs/devices/riscv64-softmmu/default.mak | 1 + hw/riscv/Kconfig | 6 + hw/riscv/meson.build | 1 + hw/riscv/milkv_duo.c | 118 ++++++++++++++++++++ 5 files changed, 135 insertions(+) create mode 100644 hw/riscv/milkv_duo.c diff --git a/MAINTAINERS b/MAINTAINERS index d4e9cf61ea..bef8c2f3b0 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -1872,6 +1872,15 @@ F: tests/qtest/k230-wdt-test.c F: tests/qtest/k230-gsdma-test.c F: tests/qtest/k230-decomp-gzip-test.c +Milk-V Duo +M: Kuan-Wei Chiu +S: Maintained +F: hw/misc/cv1800b_clk.c +F: hw/riscv/cv1800b.c +F: hw/riscv/milkv_duo.c +F: include/hw/misc/cv1800b_clk.h +F: include/hw/riscv/cv1800b.h + RX Machines ----------- rx-gdbsim diff --git a/configs/devices/riscv64-softmmu/default.mak b/configs/devices/riscv64-softmmu/default.mak index a8e4d0ab33..2ba91b14d4 100644 --- a/configs/devices/riscv64-softmmu/default.mak +++ b/configs/devices/riscv64-softmmu/default.mak @@ -13,3 +13,4 @@ # CONFIG_SHAKTI_C=n # CONFIG_XIANGSHAN_KUNMINGHU=n # CONFIG_MIPS_BOSTON_AIA=n +# CONFIG_MILKV_DUO=n diff --git a/hw/riscv/Kconfig b/hw/riscv/Kconfig index b7c0871c67..70a331f7ae 100644 --- a/hw/riscv/Kconfig +++ b/hw/riscv/Kconfig @@ -172,3 +172,9 @@ config SOPHGO_CV1800B select SIFIVE_PLIC select SOPHGO_CV1800B_CLK select DW8250 + +config MILKV_DUO + bool + depends on RISCV64 + default y + select SOPHGO_CV1800B diff --git a/hw/riscv/meson.build b/hw/riscv/meson.build index 45895486d4..a40e80645b 100644 --- a/hw/riscv/meson.build +++ b/hw/riscv/meson.build @@ -23,5 +23,6 @@ riscv_ss.add(when: 'CONFIG_MIPS_BOSTON_AIA', if_true: files('boston-aia.c')) riscv_ss.add(when: 'CONFIG_K230', if_true: files('k230.c')) riscv_ss.add(when: 'CONFIG_SOPHGO_CV1800B', if_true: files('cv1800b.c')) +riscv_ss.add(when: 'CONFIG_MILKV_DUO', if_true: files('milkv_duo.c')) hw_arch += {'riscv': riscv_ss} diff --git a/hw/riscv/milkv_duo.c b/hw/riscv/milkv_duo.c new file mode 100644 index 0000000000..1285c8d34f --- /dev/null +++ b/hw/riscv/milkv_duo.c @@ -0,0 +1,118 @@ +/* SPDX-License-Identifier: GPL-2.0-or-later */ +/* + * Milk-V Duo board + * + * Copyright (c) 2026 Kuan-Wei Chiu + */ + +#include "qemu/osdep.h" +#include "qemu/units.h" +#include "qapi/error.h" +#include "hw/core/boards.h" +#include "hw/riscv/cv1800b.h" +#include "hw/riscv/boot.h" +#include "target/riscv/cpu-qom.h" +#include "system/system.h" +#include "system/device_tree.h" +#include "qemu/error-report.h" +#include "hw/core/loader.h" +#include + +struct MilkVDuoState { + MachineState parent_obj; + CV1800BSoCState soc; +}; + +#define TYPE_MILK_V_DUO MACHINE_TYPE_NAME("milkv-duo") +OBJECT_DECLARE_SIMPLE_TYPE(MilkVDuoState, MILK_V_DUO) + +static void milkv_duo_init(MachineState *machine) +{ + MilkVDuoState *s = MILK_V_DUO(machine); + MemoryRegion *system_memory = get_system_memory(); + RISCVBootInfo boot_info; + const char *firmware_name; + hwaddr firmware_load_addr, firmware_end_addr; + hwaddr fdt_load_addr = 0; + int fdt_size = 0; + uint64_t kernel_entry = 0; + + object_initialize_child(OBJECT(machine), "soc", &s->soc, TYPE_CV1800B_SOC); + qdev_realize(DEVICE(&s->soc), NULL, &error_fatal); + + memory_region_add_subregion(system_memory, + cv1800b_memmap[CV1800B_DEV_DRAM].base, + machine->ram); + + riscv_boot_info_init(&boot_info, &s->soc.cpus); + + firmware_name = riscv_default_firmware_name(&s->soc.cpus); + firmware_load_addr = cv1800b_memmap[CV1800B_DEV_DRAM].base; + firmware_end_addr = riscv_find_and_load_firmware(machine, &boot_info, + firmware_name, + &firmware_load_addr, NULL); + + if (machine->dtb) { + machine->fdt = load_device_tree(machine->dtb, &fdt_size); + if (!machine->fdt) { + error_report("Failed to load device tree"); + exit(1); + } + + if (machine->kernel_cmdline && *machine->kernel_cmdline) { + if (fdt_path_offset(machine->fdt, "/chosen") < 0) { + qemu_fdt_add_subnode(machine->fdt, "/chosen"); + } + qemu_fdt_setprop_string(machine->fdt, "/chosen", "bootargs", + machine->kernel_cmdline); + } + } + + if (machine->kernel_filename) { + hwaddr kernel_start_addr = riscv_calc_kernel_start_addr(&boot_info, + firmware_end_addr); + riscv_load_kernel(machine, &boot_info, kernel_start_addr, true, NULL); + kernel_entry = boot_info.image_low_addr; + } + + if (machine->dtb) { + fdt_load_addr = riscv_compute_fdt_addr(cv1800b_memmap[CV1800B_DEV_DRAM].base, + machine->ram_size, machine, &boot_info); + riscv_load_fdt(fdt_load_addr, machine->fdt); + } + + riscv_setup_rom_reset_vec(machine, &s->soc.cpus, + firmware_load_addr, + cv1800b_memmap[CV1800B_DEV_ROM].base, + cv1800b_memmap[CV1800B_DEV_ROM].size, + kernel_entry, + fdt_load_addr); +} + +static void milkv_duo_machine_class_init(ObjectClass *oc, const void *data) +{ + MachineClass *mc = MACHINE_CLASS(oc); + static const char *const valid_cpu_types[] = { + TYPE_RISCV_CPU_THEAD_C906, + NULL + }; + + mc->desc = "Milk-V Duo Board (CV1800B)"; + mc->init = milkv_duo_init; + mc->max_cpus = 2; + mc->default_cpu_type = TYPE_RISCV_CPU_THEAD_C906; + mc->valid_cpu_types = valid_cpu_types; + mc->default_ram_size = 64 * MiB; + mc->default_ram_id = "riscv.milkv_duo.ram"; +} + +static const TypeInfo milkv_duo_machine_type_infos[] = { + { + .name = TYPE_MILK_V_DUO, + .parent = TYPE_MACHINE, + .instance_size = sizeof(MilkVDuoState), + .class_init = milkv_duo_machine_class_init, + }, +}; + +DEFINE_TYPES(milkv_duo_machine_type_infos) -- 2.56.0.rc1.315.gc6ed9934b7-goog