Re: [PATCH 2/2] perf jevents: Add NVIDIA Tegra410 uncore PCIe metrics

[sashiko-bot@kernel.org]

> Add PCIe bandwidth metrics for the NVIDIA Tegra410 SoC. The formulas
> follow Documentation/admin-guide/perf/nvidia-tegra410-pmu.rst:
> 
>   AVG_RD_BANDWIDTH_IN_GBPS = RD_BYTES / ELAPSED_TIME_IN_NS
>   AVG_WR_BANDWIDTH_IN_GBPS = WR_BYTES / ELAPSED_TIME_IN_NS
> 
> There is one PCIE PMU per socket and PCIe Root Complex (RC), named
> nvidia_pcie_pmu_<socket-id>_rc_<pcie-rc-id>, with RCs 0 to 5 in each
> socket. The metrics sum the rd_bytes/wr_bytes events of both sockets:
> 
>   lpm_pcie_bw, lpm_pcie_rd_bw, lpm_pcie_wr_bw: all RCs.
>   lpm_pcie_bw_<rc>, lpm_pcie_rd_bw_<rc>, lpm_pcie_wr_bw_<rc>: one RC.
>   lpm_pcie_loc_rd_bw_<rc>, lpm_pcie_loc_wr_bw_<rc>: one RC to local
>     CMEM, GMEM, PCIe peer and CXL memory.
>   lpm_pcie_rem_rd_bw_<rc>, lpm_pcie_rem_wr_bw_<rc>: one RC to remote
>     memory.
> 
> The per RC metrics are in the lpm_pcie_rc<rc>_bw metric groups.
> 
> A socket's event counts as 0 if its PMU isn't present (has_event() is
> 0), e.g. on a single socket system, or if it isn't counted in the
> aggregation (source_count() is 0), e.g. the other socket's event with
> --per-socket. Otherwise the metric fails to parse or is nan.
> 
> Signed-off-by: Chun-Tse Shao <ctshao@google.com>

Sashiko has reviewed this patch and found no issues. It looks great!

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Sashiko AI review · https://sashiko.dev/#/patchset/20260928175127.1032535-1-ctshao@google.com?part=2