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From: sashiko-bot@kernel.org
To: "Adrián Larumbe" <adrian.larumbe@collabora.com>
Cc: dri-devel@lists.freedesktop.org
Subject: Re: [PATCH v12 11/15] drm/panfrost: Move perfcnt GPU disable sequence into a helper
Date: Tue, 29 Sep 2026 03:54:58 +0000	[thread overview]
Message-ID: <20260929035459.3296F1F000FF@smtp.kernel.org> (raw)
In-Reply-To: <20260929-claude-fixes-v12-11-62beb08de207@collabora.com>

Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider:
- [High] drm/panfrost: inverted hardware disable sequence risks spurious dump
--

commit 3efe7a19ba3bb185c762f241fc91b732bd783ed3
Author: Adrián Larumbe <adrian.larumbe@collabora.com>

drm/panfrost: Move perfcnt GPU disable sequence into a helper

This commit introduces a helper function to avoid repetition of the hardware
performance counter disable sequence.

> diff --git a/drivers/gpu/drm/panfrost/panfrost_perfcnt.c b/drivers/gpu/drm/panfrost/panfrost_perfcnt.c
> index 7020c0192e189..f71534e741b65 100644
> --- a/drivers/gpu/drm/panfrost/panfrost_perfcnt.c
> +++ b/drivers/gpu/drm/panfrost/panfrost_perfcnt.c
> @@ -35,6 +35,16 @@ struct panfrost_perfcnt {
>  	struct completion dump_comp;
>  };
>  
> +static void panfrost_perfcnt_hw_disable(struct panfrost_device *pfdev)
> +{
> +	gpu_write(pfdev, GPU_PERFCNT_CFG,
> +		  GPU_PERFCNT_CFG_MODE(GPU_PERFCNT_CFG_MODE_OFF));
> +	gpu_write(pfdev, GPU_PRFCNT_JM_EN, 0x0);
> +	gpu_write(pfdev, GPU_PRFCNT_SHADER_EN, 0x0);
> +	gpu_write(pfdev, GPU_PRFCNT_MMU_L2_EN, 0x0);
> +	gpu_write(pfdev, GPU_PRFCNT_TILER_EN, 0);
> +}

[Severity: High]
Does this sequence introduce a risk of a spurious hardware dump?

The new helper turns off the GPU_PERFCNT_CFG register before disabling the
individual block counters, which reverses the previous safe sequence in
panfrost_perfcnt_disable_locked() where the EN registers were cleared first.

Modifying the CFG register while TILER_EN is still active might trigger a
spurious dump. This seems similar to hardware erratum PRLAM-8186, which
requires TILER_EN to be off before modifying the CFG register to enable
counters.

[ ... ]

> @@ -193,12 +203,7 @@ static int panfrost_perfcnt_disable_locked(struct panfrost_device *pfdev,
>  	if (user != perfcnt->user)
>  		return -EINVAL;
>  
> -	gpu_write(pfdev, GPU_PRFCNT_JM_EN, 0x0);
> -	gpu_write(pfdev, GPU_PRFCNT_SHADER_EN, 0x0);
> -	gpu_write(pfdev, GPU_PRFCNT_MMU_L2_EN, 0x0);
> -	gpu_write(pfdev, GPU_PRFCNT_TILER_EN, 0);
> -	gpu_write(pfdev, GPU_PERFCNT_CFG,
> -		  GPU_PERFCNT_CFG_MODE(GPU_PERFCNT_CFG_MODE_OFF));
> +	panfrost_perfcnt_hw_disable(pfdev);
>  
>  	perfcnt->user = NULL;
>  	drm_gem_vunmap(&perfcnt->mapping->obj->base.base, &map);

[Severity: High]
Could a spurious hardware dump here result in memory corruption?

Because the inverted hardware disable sequence is invoked while TILER_EN is
active, a spurious hardware dump would cause the GPU to write to the
performance counter buffer asynchronously.

Since panfrost_perfcnt_disable_locked() immediately tears down and unmaps
this memory via drm_gem_vunmap(), could the GPU perform a DMA write-after-free,
leading to an IOMMU fault or memory corruption?

-- 
Sashiko AI review · https://sashiko.dev/#/patchset/20260929-claude-fixes-v12-0-62beb08de207@collabora.com?part=11

  reply	other threads:[~2026-09-29  3:55 UTC|newest]

Thread overview: 51+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-09-29  3:44 [PATCH v12 00/15] Collection of fixes for Panfrost: Perfcnt, RPM, refactorings Adrián Larumbe
2026-09-29  3:44 ` [PATCH v12 01/15] drm/panfrost: Move shrinker initialization and unplug one level down Adrián Larumbe
2026-10-02 13:58   ` Steven Price
2026-09-29  3:44 ` [PATCH v12 02/15] drm/panfrost: Move lock and modparam initialisations into their subsystems Adrián Larumbe
2026-10-02 14:06   ` Steven Price
2026-09-29  3:44 ` [PATCH v12 03/15] drm/panfrost: Move debugfs initialisation to relevant subsystems Adrián Larumbe
2026-10-02 14:10   ` Steven Price
2026-10-06  0:50     ` Adrián Larumbe
2026-09-29  3:44 ` [PATCH v12 04/15] drm/panfrost: Skip NULL checks for clock enable/disabling Adrián Larumbe
2026-10-02 14:14   ` Steven Price
2026-09-29  3:44 ` [PATCH v12 05/15] drm/panfrost: Consolidate device clock management and reset Adrián Larumbe
2026-09-29  3:56   ` sashiko-bot
2026-10-02 14:20   ` Steven Price
2026-09-29  3:44 ` [PATCH v12 06/15] drm/panfrost: Fix PM refcnt and autosuspend issues at device probe/remove Adrián Larumbe
2026-10-02 14:21   ` Steven Price
2026-09-29  3:44 ` [PATCH v12 07/15] drm/panfrost: Explicitly enable MMU interrupts at device init Adrián Larumbe
2026-10-02 14:26   ` Steven Price
2026-09-29  3:44 ` [PATCH v12 08/15] drm/panfrost: Move all DRM device initialisation into device_init() Adrián Larumbe
2026-10-02 14:37   ` Steven Price
2026-09-29  3:44 ` [PATCH v12 09/15] drm/panfrost: Add warning messages to fatal error conditions Adrián Larumbe
2026-10-02 14:59   ` Steven Price
2026-10-06 15:09     ` Adrián Larumbe
2026-10-07 12:51       ` Steven Price
2026-09-29  3:44 ` [PATCH v12 10/15] drm/panfrost: Add debugfs knob for manually triggering a GPU reset Adrián Larumbe
2026-10-02 15:10   ` Steven Price
2026-10-06 13:38     ` Adrián Larumbe
2026-10-07 12:54       ` Steven Price
2026-09-29  3:44 ` [PATCH v12 11/15] drm/panfrost: Move perfcnt GPU disable sequence into a helper Adrián Larumbe
2026-09-29  3:54   ` sashiko-bot [this message]
2026-09-29  3:44 ` [PATCH v12 12/15] drm/panfrost: Skip cache flush/invalidate when enabling perfcnt Adrián Larumbe
2026-10-02 15:14   ` Steven Price
2026-10-05  8:38     ` Boris Brezillon
2026-10-05 15:06       ` Steven Price
2026-10-05 15:37         ` Boris Brezillon
2026-10-05 16:05           ` Steven Price
2026-10-05 16:57             ` Boris Brezillon
2026-10-06 17:42               ` Adrián Larumbe
2026-10-06 17:35             ` Adrián Larumbe
2026-10-07 13:28               ` Steven Price
2026-10-06 17:18         ` Adrián Larumbe
2026-10-07 13:21           ` Steven Price
2026-10-06 16:45     ` Adrián Larumbe
2026-10-07 13:09       ` Steven Price
2026-09-29  3:44 ` [PATCH v12 13/15] drm/panfrost: Avoid cache flush after perfcnt sample in fully coherent systems Adrián Larumbe
2026-10-02 15:28   ` Steven Price
2026-09-29  3:44 ` [PATCH v12 14/15] drm/panfrost: Introduce a reset lock Adrián Larumbe
2026-10-02 15:34   ` Steven Price
2026-09-29  3:44 ` [PATCH v12 15/15] drm/panfrost: Fix races between perfcnt and reset sequence Adrián Larumbe
2026-09-29  4:00   ` sashiko-bot
2026-10-02 15:44   ` Steven Price
2026-10-06 14:14     ` Adrián Larumbe

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