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From: Ginger Li <ginger.jzllee@gmail.com>
To: Markus.Elfring@web.de, dmaengine@vger.kernel.org,
	linux-tegra@vger.kernel.org
Cc: linux-kernel@vger.kernel.org, jonathanh@nvidia.com,
	ldewangan@nvidia.com, vkoul@kernel.org
Subject: [PATCH v3] dmaengine: tegra186-gpc-dma: Read channel state under the lock
Date: Wed, 30 Sep 2026 09:19:16 +0200	[thread overview]
Message-ID: <20260930071916.35722-1-ginger.jzllee@gmail.com> (raw)
In-Reply-To: <20260929194434.29937-1-ginger.jzllee@gmail.com>

My static analyzer detected a potential issue in the dmag engine.
tegra_dma_tx_status() reads tdc->status before taking tdc->vc.lock, and
tegra_dma_isr() snapshots tdc->dma_desc before taking the same lock.  All
writers of these fields (tegra_dma_start(), tegra_dma_xfer_complete(),
tegra_dma_pause(), tegra_dma_resume() and tegra_dma_terminate_all()) update
them under tdc->vc.lock.

The unlocked read in tegra_dma_tx_status() can therefore report DMA_PAUSED
for a transfer that has already completed, and the unlocked read in
tegra_dma_isr() can pick up a tdc->dma_desc which is being cleared
concurrently, in which case the handler keeps using a stale descriptor
pointer.

Read both fields while holding tdc->vc.lock.

Fixes: ee17028009d4 ("dmaengine: tegra: Add tegra gpcdma driver")
Signed-off-by: Ginger Li <ginger.jzllee@gmail.com>
---
v3:
 - Acknowledge the usage of static analysis in detecting this problem.
---
 drivers/dma/tegra186-gpc-dma.c | 5 +++--
 1 file changed, 3 insertions(+), 2 deletions(-)

diff --git a/drivers/dma/tegra186-gpc-dma.c b/drivers/dma/tegra186-gpc-dma.c
--- a/drivers/dma/tegra186-gpc-dma.c
+++ b/drivers/dma/tegra186-gpc-dma.c
@@ -606,7 +606,7 @@ static irqreturn_t tegra_dma_isr(int irq, void *dev_id
 static irqreturn_t tegra_dma_isr(int irq, void *dev_id)
 {
 	struct tegra_dma_channel *tdc = dev_id;
-	struct tegra_dma_desc *dma_desc = tdc->dma_desc;
+	struct tegra_dma_desc *dma_desc;
 	struct tegra_dma_sg_req *sg_req;
 	u32 status;
 
@@ -619,6 +619,7 @@ static irqreturn_t tegra_dma_isr(int irq, void *dev_id
 	}
 
 	spin_lock(&tdc->vc.lock);
+	dma_desc = tdc->dma_desc;
 	status = tdc_read(tdc, tdc->regs->status);
 	if (!(status & TEGRA_GPCDMA_STATUS_ISE_EOC))
 		goto irq_done;
@@ -786,10 +787,10 @@ static enum dma_status tegra_dma_tx_status(struct dma_
 	if (ret == DMA_COMPLETE)
 		return ret;
 
+	spin_lock_irqsave(&tdc->vc.lock, flags);
 	if (tdc->status == DMA_PAUSED)
 		ret = DMA_PAUSED;
 
-	spin_lock_irqsave(&tdc->vc.lock, flags);
 	vd = vchan_find_desc(&tdc->vc, cookie);
 	if (vd) {
 		dma_desc = vd_to_tegra_dma_desc(vd);
-- 
2.43.0


  parent reply	other threads:[~2026-09-30  7:19 UTC|newest]

Thread overview: 15+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-09-22  7:22 [PATCH] dmaengine: tegra186-gpc-dma: Read channel state under the lock Ginger Li
2026-09-23 19:44 ` Markus Elfring
2026-09-29 19:44 ` [PATCH v2] " Ginger Li
2026-09-30  7:04   ` Markus Elfring
2026-09-30  7:10     ` Ginger
2026-09-30  7:18       ` [v2] " Markus Elfring
2026-09-30  7:19   ` Ginger Li [this message]
2026-09-30  7:25     ` [PATCH v3] " Markus Elfring
2026-09-30  7:33       ` Ginger
2026-09-30  7:46         ` [v3] " Markus Elfring
2026-09-30 11:57           ` Ginger
2026-09-30 12:21             ` Markus Elfring
2026-09-30 12:36               ` Ginger
2026-09-30 12:55                 ` Markus Elfring
2026-10-01 10:56             ` Dan Carpenter

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