From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-alma10-1.taild15c8.ts.net [100.103.45.18]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 8C8F64F4758; Wed, 30 Sep 2026 15:41:53 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=100.103.45.18 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1790782917; cv=none; b=L9nFx/EcsY1gnhnPD/p+P8ACCWfjH3q0/q1W/oMpRJogWqYZU/WH58rmqruRKVTObuYMCMLSEGrlWjdOxXw+koCyCJTTogwKSBdsMmZnLOhdICkC4yRd2d82rLEzqL1ghTsmQjH6YO5B2uMcMG//BYsN1Mnv+dccfLE27Z9p2+0= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1790782917; c=relaxed/simple; bh=MuESxLhvvFqtOtSPjcmPN/RKbJA/l1Oq+qCH+z+RfmY=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=rmHL3dj1MiYUEWz3s+3/ne5H0UEbSYRb/H3RFIBYeLd3h9aza2DpkY69bIcTc1w2rCVqxpmMTpgxEZhCb8U2zkrn34SsduR/C590/167C0bxmpoZ3Yneshra1atB2zRy5eYQJ43ehl3+SLbOkJjWObCYv1bfjLaFCQJM3jRCAps= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=linuxfoundation.org header.i=@linuxfoundation.org header.b=XUJrgC7f; arc=none smtp.client-ip=100.103.45.18 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=linuxfoundation.org header.i=@linuxfoundation.org header.b="XUJrgC7f" Received: by smtp.kernel.org (Postfix) with ESMTPSA id 35E751F00898; Wed, 30 Sep 2026 15:41:53 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linuxfoundation.org; s=korg; t=1790782913; bh=XapiHeS9UbmTC9bLOG/xogL3s6SoDthaoFrkw/PoyvQ=; h=From:To:Cc:Subject:Date:In-Reply-To:References; b=XUJrgC7flk8MMUco+bTNOHmLGpZZWpjACYRa6L18XOVnojaR4qZZQ9vSCbg+FLkss 4Sz03gbL3XV6ZBH7b+LX5J2qYY3K6aDDL3McB2vGFxD0ngoLxekWevrK3yXuZ7Qq3o f3/lA5omUSJTenz8eGDONtiK7Fp7Sdeg5gsTYGlc= From: Greg Kroah-Hartman To: stable@vger.kernel.org Cc: Greg Kroah-Hartman , patches@lists.linux.dev, Liang Hao , Bartosz Golaszewski , Sasha Levin Subject: [PATCH 5.10 159/595] gpio: dwapb: Mask interrupts at hardware initialization Date: Wed, 30 Sep 2026 17:20:52 +0200 Message-ID: <20260930152351.156698628@linuxfoundation.org> X-Mailer: git-send-email 2.55.0 In-Reply-To: <20260930152347.700140858@linuxfoundation.org> References: <20260930152347.700140858@linuxfoundation.org> User-Agent: quilt/0.69 X-stable: review X-Patchwork-Hint: ignore Precedence: bulk X-Mailing-List: patches@lists.linux.dev List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit 5.10-stable review patch. If anyone has any objections, please let me know. ------------------ From: Liang Hao [ Upstream commit aaf7766ba3b99a3834319e7cf939838afc705574 ] GPIO interrupts may retain stale state across warm reboots when peripherals remain powered. If a GPIO line is not explicitly configured for interrupts, this can result in interrupt storms due to missing handlers. Fix this by ensuring all interrupts are masked and disabled at hardware initialization time via the init_hw() callback. Pending interrupts are also cleared to start from a known-safe state. Interrupts will be unmasked only when explicitly configured by userspace or kernel drivers. Signed-off-by: Liang Hao Link: https://patch.msgid.link/20260705074759.47863-1-haohlliang@gmail.com Signed-off-by: Bartosz Golaszewski Signed-off-by: Sasha Levin --- drivers/gpio/gpio-dwapb.c | 17 +++++++++++++++++ 1 file changed, 17 insertions(+) diff --git a/drivers/gpio/gpio-dwapb.c b/drivers/gpio/gpio-dwapb.c index ea2e2618b7945..d6240ae0f87ca 100644 --- a/drivers/gpio/gpio-dwapb.c +++ b/drivers/gpio/gpio-dwapb.c @@ -189,6 +189,22 @@ static void dwapb_toggle_trigger(struct dwapb_gpio *gpio, unsigned int offs) dwapb_write(gpio, GPIO_INT_POLARITY, pol); } +static int dwapb_irq_init_hw(struct gpio_chip *gc) +{ + struct dwapb_gpio *gpio = to_dwapb_gpio(gc); + + /* + * GPIO interrupts may retain stale state across warm reboots when + * peripherals stay powered. Force a known-safe state before the GPIO + * irqchip and irq domain are set up. + */ + dwapb_write(gpio, GPIO_INTEN, 0); + dwapb_write(gpio, GPIO_INTMASK, 0xffffffff); + dwapb_write(gpio, GPIO_PORTA_EOI, 0xffffffff); + + return 0; +} + static u32 dwapb_do_irq(struct dwapb_gpio *gpio) { struct gpio_chip *gc = &gpio->ports[0].gc; @@ -428,6 +444,7 @@ static void dwapb_configure_irqs(struct dwapb_gpio *gpio, girq = &gc->irq; girq->handler = handle_bad_irq; girq->default_type = IRQ_TYPE_NONE; + girq->init_hw = dwapb_irq_init_hw; port->pirq = pirq; pirq->irqchip.name = DWAPB_DRIVER_NAME; -- 2.53.0