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Fri, 2 Oct 2026 14:33:25 -0500 From: To: CC: Harry Wentland , Leo Li , Roman Li , Wayne Lin , Tom Chung , Fangzhi Zuo , Dan Wheeler , Ray Wu , Ivan Lipski , Alex Hung , James Lin , Chenyu Chen Subject: [PATCH 16/17] drm/amd/display: Send HDMI VRR metadata in VTEM info packet slot Date: Fri, 2 Oct 2026 15:32:39 -0400 Message-ID: <20261002193240.3441018-17-Roman.Li@amd.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20261002193240.3441018-1-Roman.Li@amd.com> References: <20261002193240.3441018-1-Roman.Li@amd.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: BN3PEPF00022BD7:EE_|IA1PR12MB7615:EE_ X-MS-Office365-Filtering-Correlation-Id: e91d9132-f4a7-4e94-6ff4-08df20bc0913 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; ARA:13230040|1800799024|376014|36860700016|82310400026|23010399003|10067099003|11063799006|56012099006|18002099003|22082099003; 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DIR:OUT; SFP:1101; X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: tIZpE4P/fPVPuIvP6Sr5mZTFyoTx9l1k7mSyrgKJ8uqjwUtwvYW5TF5fNMIr8PUvMdVVpqS7eJnlSYBbFUmMuuNkDXXURULx8W1jdJ2mQOTQVtK8yN9PmPrgCPusn2xgpDRgCob0d9AAfCdbYA2SayFZYyXM3qf5TMum/9LpWvup6qYh5BAKt4OfXUjQr2+ykHwC8wuWwfqiJP7yZn4NzhDCQvTD6T8ls6STvN7Sh8a/MmNB/Gq+Ud8hKTaU/3QrDubHlbi7dMsEfQSYIbPT2vqhv/wB8CVNgEucTP/8OnepZvxabaRmDjJwGT2db8dM+MaJpTmJHKfwLeRaLyTK+xGrFSq0+WPSDBj0ifpyvdzQR7rn2Mvkn8g/nAAJh7AKFDzBlN4Hj3kyQsPrjyHH9Z64OW5h7OD+TaEv/EtaHoOGvo6R0ogr/yi9ewUxBuEJ X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 02 Oct 2026 19:33:28.7671 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: e91d9132-f4a7-4e94-6ff4-08df20bc0913 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d; Ip=[165.204.84.17]; Helo=[satlexmb07.amd.com] X-MS-Exchange-CrossTenant-AuthSource: BN3PEPF00022BD7.namprd03.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: IA1PR12MB7615 X-BeenThere: amd-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Discussion list for AMD gfx List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: amd-gfx-bounces@lists.freedesktop.org Sender: "amd-gfx" From: Ivan Lipski [Why] Brief blank on HDMI each time VRR engaged and disengaged, with no modeset at either transition. amdgpu_dm_update_freesync_state_on_stream() built the VTEM on top of the buffer holding the AMD FreeSync SPD payload, which becomes stream->vrr_infopacket. DC routes that to HDMI generic slot 3 (SPD) and vtem_infopacket to slot 6 (VTEM), and vtem_infopacket was never populated. So slot 3 carried a VTEM payload the sink parsed as an SPD InfoFrame, no VTEM was sent, and v_total varied with no valid metadata describing it. DP uses the VSC/AS-SDP path and is unaffected. [How] Build the VTEM into a separate vtem_infopacket, gated on the sink not advertising AMD FreeSync. Track it in dm_crtc_state, include it in the freesync_vrr_info_changed comparison and the reset path, and pass it through bundle->stream_update.vtem_infopacket. Reviewed-by: Jerry Zuo Signed-off-by: Ivan Lipski Signed-off-by: Roman Li --- .../gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 2 ++ .../gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.h | 1 + .../display/amdgpu_dm/amdgpu_dm_freesync.c | 26 +++++++++++++++---- 3 files changed, 24 insertions(+), 5 deletions(-) diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c index 6e5dbe0bd82e..f3ed3fef59f9 100644 --- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c +++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c @@ -4141,6 +4141,8 @@ static void amdgpu_dm_commit_planes(struct drm_atomic_commit *state, if (acrtc_state->freesync_vrr_info_changed) { bundle->stream_update.vrr_infopacket = &acrtc_state->stream->vrr_infopacket; + bundle->stream_update.vtem_infopacket = + &acrtc_state->stream->vtem_infopacket; bundle->stream_update.vsp_infopacket = &acrtc_state->stream->vsp_infopacket; stream_update_needed = true; diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.h b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.h index 2ead9bc8e439..594d275918d5 100644 --- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.h +++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.h @@ -1076,6 +1076,7 @@ struct dm_crtc_state { bool vrr_supported; struct mod_freesync_config freesync_config; struct dc_info_packet vrr_infopacket; + struct dc_info_packet vtem_infopacket; int abm_level; diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_freesync.c b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_freesync.c index 1d9148ccfd4f..f4ce389fd0aa 100644 --- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_freesync.c +++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_freesync.c @@ -107,6 +107,8 @@ void amdgpu_dm_reset_freesync_config_for_crtc( memset(&new_crtc_state->vrr_infopacket, 0, sizeof(new_crtc_state->vrr_infopacket)); + memset(&new_crtc_state->vtem_infopacket, 0, + sizeof(new_crtc_state->vtem_infopacket)); } EXPORT_SYMBOL_IF_KUNIT(amdgpu_dm_reset_freesync_config_for_crtc); @@ -172,6 +174,7 @@ void amdgpu_dm_update_freesync_state_on_stream( { struct mod_vrr_params vrr_params; struct dc_info_packet vrr_infopacket = {0}; + struct dc_info_packet vtem_infopacket = {0}; struct amdgpu_device *adev = dm->adev; struct amdgpu_crtc *acrtc = to_amdgpu_crtc(new_crtc_state->base.crtc); unsigned long flags; @@ -238,21 +241,34 @@ void amdgpu_dm_update_freesync_state_on_stream( &vrr_infopacket, pack_sdp_v1_3); - /* Per HDMI 2.1, VTEM is valid on TMDS as well as FRL */ - if (new_stream->signal == SIGNAL_TYPE_HDMI_FRL || - (new_stream->signal == SIGNAL_TYPE_HDMI_TYPE_A && - aconn && aconn->base.display_info.hdmi.vrr_cap.supported)) - mod_build_infopacket_vtem(new_stream, &vrr_params, 0, &vrr_infopacket); + /* + * If the sink does not support FreeSync, but it does support VRR, + * we need to build a VTEM packet to enable VRR. + */ + if (aconn && !aconn->vsdb_info.freesync_supported && + aconn->base.display_info.hdmi.vrr_cap.supported && + (new_stream->signal == SIGNAL_TYPE_HDMI_FRL || + new_stream->signal == SIGNAL_TYPE_HDMI_TYPE_A)) { + mod_build_infopacket_vtem(new_stream, &vrr_params, 0, &vtem_infopacket); + memset(&vrr_infopacket, 0, sizeof(vrr_infopacket)); + } new_crtc_state->freesync_vrr_info_changed |= (memcmp(&new_crtc_state->vrr_infopacket, &vrr_infopacket, sizeof(vrr_infopacket)) != 0); + new_crtc_state->freesync_vrr_info_changed |= + (memcmp(&new_crtc_state->vtem_infopacket, + &vtem_infopacket, + sizeof(vtem_infopacket)) != 0); + acrtc->dm_irq_params.vrr_params = vrr_params; new_crtc_state->vrr_infopacket = vrr_infopacket; + new_crtc_state->vtem_infopacket = vtem_infopacket; new_stream->vrr_infopacket = vrr_infopacket; + new_stream->vtem_infopacket = vtem_infopacket; new_stream->allow_freesync = mod_freesync_get_freesync_enabled(&vrr_params); /* -- 2.34.1