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Fri, 2 Oct 2026 14:33:05 -0500 From: To: CC: Harry Wentland , Leo Li , Roman Li , Wayne Lin , Tom Chung , Fangzhi Zuo , Dan Wheeler , Ray Wu , Ivan Lipski , Alex Hung , James Lin , Chenyu Chen , Ilya Bakoulin , Relja Vojvodic , Chris Park Subject: [PATCH 04/17] drm/amd/display: Add HDMI RR and SCDC skips Date: Fri, 2 Oct 2026 15:32:27 -0400 Message-ID: <20261002193240.3441018-5-Roman.Li@amd.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20261002193240.3441018-1-Roman.Li@amd.com> References: <20261002193240.3441018-1-Roman.Li@amd.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: CH2PEPF00000146:EE_|CYYPR12MB8856:EE_ X-MS-Office365-Filtering-Correlation-Id: 0d6c7269-5e0e-4976-c650-08df20bc0083 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; ARA:13230040|82310400026|1800799024|36860700016|376014|23010399003|3023799007|11063799006|10067099003|5023799004|18002099003|56012099006|22082099003; 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DIR:OUT; SFP:1101; X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: 3e9sDl/fSbWkxWec5NSsTVe7xDMobrhFP6HdRkqvZcdlKWMJzDqzqNkDZJUQYukmhqHHRuJhsQzMk6j2RRvEFtH/kJ0xLv8CMX+ZqxCyPr14iYEh57bUaRlrYRRfgrYPLU5kFhLU/UVyfWnmxRiu5FOLZ2bfi+zSEGeimnOuByh/PKd7wqhoeFRMQN9HCAFxcmPZYHCXbIy7KvWlpXoI2/N532EvSi0UpBCwM2c6i3y+1qSvG1JMeg0Rs05DkIc8LXUk9r18esqDaNZRhA6fPQTgICTa1CAQzZMBfDMCwocM6sCLnBZoH8hOEWMHZBEexB1rXyTNbJdaCZMLWGh72ooidE/bWega0CJZykM5IQ4X/XDx3rz034j2XucdUd0GVksRKtyweU3FG1NiDDRmH+LQHOeMCH6s/ZSg5czIal/OBJTgcp1l87zx+ZAt/A38 X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 02 Oct 2026 19:33:14.3908 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 0d6c7269-5e0e-4976-c650-08df20bc0083 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d; Ip=[165.204.84.17]; Helo=[satlexmb08.amd.com] X-MS-Exchange-CrossTenant-AuthSource: CH2PEPF00000146.namprd02.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: CYYPR12MB8856 X-BeenThere: amd-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Discussion list for AMD gfx List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: amd-gfx-bounces@lists.freedesktop.org Sender: "amd-gfx" From: Ilya Bakoulin [Why/How] - Add debug key to avoid enabling RR by default. - Skip SCDC access if sink or SCDC cap not present Reviewed-by: Relja (Reggie) Vojvodic Reviewed-by: Chris Park Signed-off-by: Ilya Bakoulin Signed-off-by: Roman Li --- drivers/gpu/drm/amd/display/dc/dc.h | 1 + drivers/gpu/drm/amd/display/dc/link/link_detection.c | 4 +++- drivers/gpu/drm/amd/display/dc/link/protocols/link_ddc.c | 9 ++++++++- 3 files changed, 12 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/amd/display/dc/dc.h b/drivers/gpu/drm/amd/display/dc/dc.h index bed0daeb0c6f..d2256c454424 100644 --- a/drivers/gpu/drm/amd/display/dc/dc.h +++ b/drivers/gpu/drm/amd/display/dc/dc.h @@ -1293,6 +1293,7 @@ struct dc_debug_options { union fw_assisted_mclk_switch_version fams_version; union dmub_fams2_global_feature_config fams2_config; bool fams2_imm_restore_drr; + bool skip_hdmi_rr_enable; unsigned int force_cositing; unsigned int disable_spl; unsigned int force_easf; diff --git a/drivers/gpu/drm/amd/display/dc/link/link_detection.c b/drivers/gpu/drm/amd/display/dc/link/link_detection.c index 12fd4fd24a90..b4546f93af0c 100644 --- a/drivers/gpu/drm/amd/display/dc/link/link_detection.c +++ b/drivers/gpu/drm/amd/display/dc/link/link_detection.c @@ -1391,8 +1391,10 @@ static bool detect_link_and_local_sink(struct dc_link *link, read_idcc_data(link->ddc, HDMI_IDCC_SCOPE_RW_CA, link->hdmi_cable_id.raw, 0, 4); } - if (sink->edid_caps.rr_capable) + + if (sink->edid_caps.rr_capable && !dc->debug.skip_hdmi_rr_enable) hdmi_frl_write_read_request_enable(link->ddc); + /* When FreeSync is toggled through OSD, * we see same EDID no matter what. Check MCCS caps * to see if we should update FreeSync caps now. diff --git a/drivers/gpu/drm/amd/display/dc/link/protocols/link_ddc.c b/drivers/gpu/drm/amd/display/dc/link/protocols/link_ddc.c index d87f6f377d06..3fbfc6e2594b 100644 --- a/drivers/gpu/drm/amd/display/dc/link/protocols/link_ddc.c +++ b/drivers/gpu/drm/amd/display/dc/link/protocols/link_ddc.c @@ -580,6 +580,9 @@ void write_scdc_data(struct ddc_service *ddc_service, uint8_t write_buffer[2] = {0}; /*Lower than 340 Scramble bit from SCDC caps*/ + if (!ddc_service->link->local_sink) + return; + if (ddc_service->link->local_sink && (ddc_service->link->local_sink->edid_caps.panel_patch.skip_scdc_overwrite || !ddc_service->link->local_sink->edid_caps.scdc_present)) @@ -617,8 +620,12 @@ void read_scdc_data(struct ddc_service *ddc_service) uint8_t offset = HDMI_SCDC_TMDS_CONFIG; uint8_t tmds_config = 0; + if (!ddc_service->link->local_sink) + return; + if (ddc_service->link->local_sink && - ddc_service->link->local_sink->edid_caps.panel_patch.skip_scdc_overwrite) + (ddc_service->link->local_sink->edid_caps.panel_patch.skip_scdc_overwrite || + !ddc_service->link->local_sink->edid_caps.scdc_present)) return; link_query_ddc_data(ddc_service, slave_address, &offset, -- 2.34.1