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From: Helge Deller <deller@kernel.org>
To: qemu-devel@nongnu.org
Cc: Richard Henderson <richard.henderson@linaro.org>,
	Craig Lalley <mr_lalley@yahoo.com>, Helge Deller <deller@gmx.de>
Subject: [PULL 4/4] hw/hppa: Place the CPU at HPA 0xfffa0000 and fw_cfg at 0xfffb0000
Date: Fri,  2 Oct 2026 23:50:14 +0200	[thread overview]
Message-ID: <20261002215014.45371-5-deller@kernel.org> (raw)
In-Reply-To: <20261002215014.45371-1-deller@kernel.org>

From: Craig Lalley <mr_lalley@yahoo.com>

On real Astro based machines (C3700, A400, A500) the first CPU is at
HPA 0xfffa0000.  QEMU puts it one page higher at 0xfffb0000 and uses
0xfffa0000 for the fw_cfg interface, which does not exist on real
hardware.  Swap both, so that the OS sees the CPU at its real address.

Please note:

- CPU_HPA is shared with the 32-bit machines, so the CPU of the B160L
  and the 715 moves as well.  On the B160L this also changes the CPU
  module number, which the firmware derives from the HPA, from 48 to
  32.  The real B160L has its CPU at 0xfff10000, so neither value is
  the real one there.

- MIN_SEABIOS_HPPA_VERSION is raised to 26. Starting with this version
  the firmware is able to cope with any CPU_HPA address which is
  provided by QEMU.

Signed-off-by: Craig Lalley <mr_lalley@yahoo.com>
Signed-off-by: Helge Deller <deller@gmx.de>
---
 hw/hppa/hppa_hardware.h | 4 ++--
 hw/hppa/machine.c       | 2 +-
 2 files changed, 3 insertions(+), 3 deletions(-)

diff --git a/hw/hppa/hppa_hardware.h b/hw/hppa/hppa_hardware.h
index 615b422865..c7ac6bdb85 100644
--- a/hw/hppa/hppa_hardware.h
+++ b/hw/hppa/hppa_hardware.h
@@ -24,7 +24,7 @@
 #define LASI_HPA        0xffd00000
 #define LASI_GFX_HPA    0xf8000000
 #define ARTIST_FB_ADDR  0xf9000000
-#define CPU_HPA         0xfffb0000
+#define CPU_HPA         0xfffa0000      /* as on real Astro based machines */
 #define MEMORY_HPA      0xfffff000
 
 #define IDE_HPA         0xf9000000      /* Boot disc controller */
@@ -48,7 +48,7 @@
 #define PORT_PCI_CMD    hppa_port_pci_cmd
 #define PORT_PCI_DATA   hppa_port_pci_data
 
-#define FW_CFG_IO_BASE  0xfffa0000
+#define FW_CFG_IO_BASE  0xfffb0000
 
 #define PORT_SERIAL1    (LASI_UART_HPA + 0x800)
 #define PORT_SERIAL2    (DINO_UART_HPA + 0x800)
diff --git a/hw/hppa/machine.c b/hw/hppa/machine.c
index fb3ef25f04..0b0a8047ed 100644
--- a/hw/hppa/machine.c
+++ b/hw/hppa/machine.c
@@ -48,7 +48,7 @@ struct HppaMachineState {
     uint64_t memsplit_addr;
 };
 
-#define MIN_SEABIOS_HPPA_VERSION 22 /* require at least this fw version */
+#define MIN_SEABIOS_HPPA_VERSION 26 /* require at least this fw version */
 
 #define HPA_POWER_BUTTON        (FIRMWARE_END - 0x10)
 static hwaddr soft_power_reg;
-- 
2.54.0



  parent reply	other threads:[~2026-10-02 21:51 UTC|newest]

Thread overview: 5+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-10-02 21:50 [PULL 0/4] HPPA A400 updates Helge Deller
2026-10-02 21:50 ` [PULL 1/4] hw/hppa: Rotate Elroy PCI interrupts by pin on the A400 Helge Deller
2026-10-02 21:50 ` [PULL 2/4] hw/hppa: Place the second Elroy of the A400 on rope 2 Helge Deller
2026-10-02 21:50 ` Helge Deller [this message]
2026-10-04 10:10 ` [PULL 0/4] HPPA A400 updates Richard Henderson

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