Re: [net-next,PATCH] enetc: Set eMDIO MDC rate to 2.5 MHz only on i.MX95

[sashiko-bot@kernel.org]

Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider:
- [High] net: enetc: uninitialized mdc_div breaks MDIO for non-PCI users
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commit 324eeacc2ec0cb1fd98e9f3ac96f2fe7f653ae78
Author: Marek Vasut <marex@nabladev.com>

enetc: Set eMDIO MDC rate to 2.5 MHz only on i.MX95

The current eMDIO MDC rate is 2.5 MHz on i.MX95 B0. It was pointed
out by NXP, that the MDC rate is divided down from clock of different
frequency and using different division ratio on different SoCs. Configure
the i.MX95 eMDIO MDC rate to 2.5 MHz to match the 802.3 specification
and reinstate previous divider ratio for all other SoCs.

> diff --git a/drivers/net/ethernet/freescale/enetc/enetc_mdio.c b/drivers/net/ethernet/freescale/enetc/enetc_mdio.c
> index a90a04a47befd..7ed9b9120f447 100644
> --- a/drivers/net/ethernet/freescale/enetc/enetc_mdio.c
> +++ b/drivers/net/ethernet/freescale/enetc/enetc_mdio.c
[ ... ]
> @@ -63,7 +63,7 @@ int enetc_mdio_write_c22(struct mii_bus *bus, int phy_id, int regnum,
>  	u16 dev_addr;
>  	int ret;
>  
> -	mdio_cfg = ENETC_EMDIO_CFG;
> +	mdio_cfg = ENETC_EMDIO_CFG(mdio_priv->mdc_div);

[Severity: High]
Does this code break MDIO communication for non-PCI users?

The mdio_priv struct is allocated and zero-initialized by drivers such as
the enetc PF driver (drivers/net/ethernet/freescale/enetc/enetc_pf_common.c
in enetc_mdio_probe() and enetc_imdio_create()), the DSA NETC driver
(drivers/net/dsa/netc/netc_main.c in netc_port_create_emdio_bus()), and the
Ocelot driver (drivers/net/dsa/ocelot/felix_vsc9959.c in
vsc9959_mdio_bus_alloc()) via devm_mdiobus_alloc_size() or
mdiobus_alloc_size().

Since this patch only initializes mdc_div in enetc_pci_mdio_probe(), mdc_div
remains 0 for these other drivers.

When enetc_mdio_write_c22() and other MDIO accessors use
ENETC_EMDIO_CFG(mdio_priv->mdc_div), the MDC clock divisor will be set to 0
instead of a valid value (like 66). This results in a clock rate that
violates the IEEE 802.3 2.5 MHz limit, breaking PHY probing and leaving
network interfaces unusable.

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Sashiko AI review · https://sashiko.dev/#/patchset/20261001223947.60189-1-marex@nabladev.com?part=1