Re: [PATCH v15 1/2] PCI: Add device-specific reset for Qualcomm SDX62/SDX65 modems

[Jose Ignacio Tornos Martinez <jtornosm@redhat.com>]

> [Severity: High]
> Could restoring PCI_COMMAND here cause a system address conflict?
>
> If the saved cmd originally had the PCI_COMMAND_MEMORY bit set (for example,
> when called from a path like Xen PCIBACK's pcistub_reset_device_state),
> writing it back immediately enables memory decode. Because the hardware reset
> has just occurred, the device's BARs will have been cleared to 0.
>
> Does this create a risk of silent memory corruption by allowing the device to
> claim physical address 0 before the PCI core has a chance to restore the BARs
> properly in pci_restore_config_space()?

The MHI SoC reset is a device-internal reset that resets the device's
firmware logic, not a PCIe fundamental reset. PCI config space
(including BARs) is maintained across this type of reset, so BARs
are not cleared to 0. The PCI_COMMAND save/restore just enables
memory access for the reset operation.