From: sashiko-bot@kernel.org
To: "Scott Lee" <dsix123@gmail.com>
Cc: linux-pci@vger.kernel.org
Subject: Re: [PATCH] PCI/P2PDMA: Add Intel Haswell client host bridge to the whitelist
Date: Mon, 05 Oct 2026 13:30:05 +0000 [thread overview]
Message-ID: <20261005133005.A2EEE1F00893@smtp.kernel.org> (raw)
In-Reply-To: <20261005132651.18368-1-dsix123@gmail.com>
> P2P DMA between two devices that do not share an upstream bridge is only
> permitted when the traffic goes through a host bridge that is listed in
> pci_p2pdma_whitelist[] with REQ_SAME_HOST_BRIDGE.
>
> The Haswell client host bridge (8086:0c08, e.g. H97/H87/B85) is not in that
> list, and cpu_supports_p2pdma() returns false on Intel, so
> calc_map_type_and_dist() refuses P2P for any pair of devices behind
> different root ports of the same host bridge, even though that root complex
> handles the traffic correctly.
>
> Measured on an ASUS H97-PRO with a Xeon E3-1231 v3 (Haswell, 8086:0c08 at
> 00:00.0) and two GPUs on separate root ports of that host bridge
> (00:01.0 and 00:1c.4):
>
> - pci_p2pdma_distance() < 0 before the change; peer access granted after
> [ ... ]
> pci_p2pdma_distance() all still apply. Tested on one board only, so the
> usual caveat applies - broad testing on other Haswell boards would be
> needed before this can be considered generally safe.
>
> Signed-off-by: Scott Lee <dsix123@gmail.com>
Sashiko has reviewed this patch and found no issues. It looks great!
--
Sashiko AI review · https://sashiko.dev/#/patchset/20261005132651.18368-1-dsix123@gmail.com?part=1
next prev parent reply other threads:[~2026-10-05 13:30 UTC|newest]
Thread overview: 3+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-10-05 13:26 [PATCH] PCI/P2PDMA: Add Intel Haswell client host bridge to the whitelist Scott Lee
2026-10-05 13:30 ` sashiko-bot [this message]
2026-10-05 15:00 ` Bjorn Helgaas
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