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Mon, 05 Oct 2026 15:12:44 -0700 (PDT) Received: from server.lan ([168.138.199.194]) by smtp.gmail.com with ESMTPSA id 98e67ed59e1d1-3a8533aba95sm1719425a91.2.2026.10.05.15.12.39 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 05 Oct 2026 15:12:43 -0700 (PDT) From: Coia Prant To: Vinod Koul Cc: Neil Armstrong , Manivannan Sadhasivam , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Heiko Stuebner , linux-phy@lists.infradead.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org, Coia Prant Subject: [PATCH v10 0/2] phy: rockchip: naneng-combphy: add SGMII MAC selection for RK3568 Date: Tue, 6 Oct 2026 06:12:27 +0800 Message-ID: <20261005221229.1095843-1-coiaprant@gmail.com> X-Mailer: git-send-email 2.47.3 MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.9.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20261005_151245_816482_F359B14B X-CRM114-Status: UNSURE ( 9.46 ) X-CRM114-Notice: Please train this message. X-BeenThere: linux-rockchip@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: Upstream kernel work for Rockchip platforms List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "Linux-rockchip" Errors-To: linux-rockchip-bounces+linux-rockchip=archiver.kernel.org@lists.infradead.org This is the PHY part split out from the v10 RK3568 SGMII series. No code changes, only re-sent separately to linux-phy as suggested by Vinod and Jakub. On RK3568, the SGMII interface can be routed to either GMAC0 or GMAC1 via the GRF register pipe_sgmii_mac_sel. Patch 1 documents the "rockchip,sgmii-mac-sel" DT property, patch 2 adds the driver support. >From the RK3568 TRM (Part1, Page 229), PIPE_GRF_XPCS_CON0 bit 1 (pipe_sgmii_mac_sel) is defined as: 0: SGMII routed to GMAC0 1: SGMII routed to GMAC1 The hardware reset value is 1 (GMAC1). If the property is set to 0, the driver routes SGMII to GMAC0; if set to 1 (or omitted), it remains at GMAC1. This is necessary for boards such as the Ariaboard Photonicat, which uses the SGMII interface connected to GMAC0. The DTS changes using this property are sent separately to Heiko/linux-rockchip, and the net-next parts (XPCS glue, dwmac-rk SGMII support) are sent separately to net-next. There is no hard build dependency; the pieces can converge during the merge window. --- Coia Prant (2): dt-bindings: phy: rockchip: naneng-combphy: add rockchip,sgmii-mac-sel property phy: rockchip: naneng-combphy: add SGMII MAC selection for RK3568 .../bindings/phy/phy-rockchip-naneng-combphy.yaml | 13 +++++++++++++ drivers/phy/rockchip/phy-rockchip-naneng-combphy.c | 8 ++++++++ 2 files changed, 21 insertions(+) -- 2.47.3 _______________________________________________ Linux-rockchip mailing list Linux-rockchip@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-rockchip From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id C1DEDCA5FF5 for ; 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Mon, 05 Oct 2026 15:12:44 -0700 (PDT) Received: from server.lan ([168.138.199.194]) by smtp.gmail.com with ESMTPSA id 98e67ed59e1d1-3a8533aba95sm1719425a91.2.2026.10.05.15.12.39 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 05 Oct 2026 15:12:43 -0700 (PDT) From: Coia Prant To: Vinod Koul Cc: Neil Armstrong , Manivannan Sadhasivam , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Heiko Stuebner , linux-phy@lists.infradead.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org, Coia Prant Subject: [PATCH v10 0/2] phy: rockchip: naneng-combphy: add SGMII MAC selection for RK3568 Date: Tue, 6 Oct 2026 06:12:27 +0800 Message-ID: <20261005221229.1095843-1-coiaprant@gmail.com> X-Mailer: git-send-email 2.47.3 MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.9.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20261005_151245_817651_6969C26B X-CRM114-Status: UNSURE ( 9.25 ) X-CRM114-Notice: Please train this message. X-BeenThere: linux-phy@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: Linux Phy Mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-phy" Errors-To: linux-phy-bounces+linux-phy=archiver.kernel.org@lists.infradead.org This is the PHY part split out from the v10 RK3568 SGMII series. No code changes, only re-sent separately to linux-phy as suggested by Vinod and Jakub. On RK3568, the SGMII interface can be routed to either GMAC0 or GMAC1 via the GRF register pipe_sgmii_mac_sel. Patch 1 documents the "rockchip,sgmii-mac-sel" DT property, patch 2 adds the driver support. >From the RK3568 TRM (Part1, Page 229), PIPE_GRF_XPCS_CON0 bit 1 (pipe_sgmii_mac_sel) is defined as: 0: SGMII routed to GMAC0 1: SGMII routed to GMAC1 The hardware reset value is 1 (GMAC1). If the property is set to 0, the driver routes SGMII to GMAC0; if set to 1 (or omitted), it remains at GMAC1. This is necessary for boards such as the Ariaboard Photonicat, which uses the SGMII interface connected to GMAC0. The DTS changes using this property are sent separately to Heiko/linux-rockchip, and the net-next parts (XPCS glue, dwmac-rk SGMII support) are sent separately to net-next. There is no hard build dependency; the pieces can converge during the merge window. --- Coia Prant (2): dt-bindings: phy: rockchip: naneng-combphy: add rockchip,sgmii-mac-sel property phy: rockchip: naneng-combphy: add SGMII MAC selection for RK3568 .../bindings/phy/phy-rockchip-naneng-combphy.yaml | 13 +++++++++++++ drivers/phy/rockchip/phy-rockchip-naneng-combphy.c | 8 ++++++++ 2 files changed, 21 insertions(+) -- 2.47.3 -- linux-phy mailing list linux-phy@lists.infradead.org https://lists.infradead.org/mailman/listinfo/linux-phy From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mail-pj2-f9.google.com (mail-pj2-f9.google.com [74.125.227.137]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 4F48837F735 for ; Mon, 5 Oct 2026 22:12:45 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=74.125.227.137 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; 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Mon, 05 Oct 2026 15:12:44 -0700 (PDT) Received: from server.lan ([168.138.199.194]) by smtp.gmail.com with ESMTPSA id 98e67ed59e1d1-3a8533aba95sm1719425a91.2.2026.10.05.15.12.39 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 05 Oct 2026 15:12:43 -0700 (PDT) From: Coia Prant To: Vinod Koul Cc: Neil Armstrong , Manivannan Sadhasivam , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Heiko Stuebner , linux-phy@lists.infradead.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org, Coia Prant Subject: [PATCH v10 0/2] phy: rockchip: naneng-combphy: add SGMII MAC selection for RK3568 Date: Tue, 6 Oct 2026 06:12:27 +0800 Message-ID: <20261005221229.1095843-1-coiaprant@gmail.com> X-Mailer: git-send-email 2.47.3 Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit This is the PHY part split out from the v10 RK3568 SGMII series. No code changes, only re-sent separately to linux-phy as suggested by Vinod and Jakub. On RK3568, the SGMII interface can be routed to either GMAC0 or GMAC1 via the GRF register pipe_sgmii_mac_sel. Patch 1 documents the "rockchip,sgmii-mac-sel" DT property, patch 2 adds the driver support. >From the RK3568 TRM (Part1, Page 229), PIPE_GRF_XPCS_CON0 bit 1 (pipe_sgmii_mac_sel) is defined as: 0: SGMII routed to GMAC0 1: SGMII routed to GMAC1 The hardware reset value is 1 (GMAC1). If the property is set to 0, the driver routes SGMII to GMAC0; if set to 1 (or omitted), it remains at GMAC1. This is necessary for boards such as the Ariaboard Photonicat, which uses the SGMII interface connected to GMAC0. The DTS changes using this property are sent separately to Heiko/linux-rockchip, and the net-next parts (XPCS glue, dwmac-rk SGMII support) are sent separately to net-next. There is no hard build dependency; the pieces can converge during the merge window. --- Coia Prant (2): dt-bindings: phy: rockchip: naneng-combphy: add rockchip,sgmii-mac-sel property phy: rockchip: naneng-combphy: add SGMII MAC selection for RK3568 .../bindings/phy/phy-rockchip-naneng-combphy.yaml | 13 +++++++++++++ drivers/phy/rockchip/phy-rockchip-naneng-combphy.c | 8 ++++++++ 2 files changed, 21 insertions(+) -- 2.47.3