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[88.187.86.199]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-4a178c33091sm138899805e9.4.2026.10.07.02.47.34 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Wed, 07 Oct 2026 02:47:34 -0700 (PDT) From: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: Richard Henderson , Paolo Bonzini , Peter Maydell , Yonggang Luo , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= , Yoshinori Sato Subject: [PATCH 19/27] target/rx: Define exception vector constants Date: Wed, 7 Oct 2026 11:45:07 +0200 Message-ID: <20261007094516.75732-20-philmd@oss.qualcomm.com> X-Mailer: git-send-email 2.55.0 In-Reply-To: <20261007094516.75732-1-philmd@oss.qualcomm.com> References: <20261007094516.75732-1-philmd@oss.qualcomm.com> MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-Proofpoint-Spam-Info: AW1haW4tMjYxMDA3MDAzOCBTYWx0ZWRfX0RP+N4iyDkpU 8A+Q2wQsTsJGFjklz3HouDIL0xpO0Om2DC5GoJCAKTIcwyVQr/x0wzyu73kMV85/+oKz4EWOL3R TbueY7MzoH/MPSqVrteyLrRngY/g090= X-Proofpoint-ORIG-GUID: yxp69vDFwPyrim_-NuSVjINIy51is6c9 X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYxMDA3MDAzOCBTYWx0ZWRfX4hSxwQVKyKEr BXIw9dbBnUqYFTekYvOcoHIGWNf1O7fXx2okEwxpdILXelzEVE82COFtsKmvIIvpdj/MT+CyPnf 5+7QVe7LZROprpgHRbLIxlzgXmQ8Z3VFGOBfBR4TdT0gS7BJsp8dE6jMXS/kEXGlFvBLnuZDgKT yy6zWt8luYnPUc7rl9J95xShReWAPXZMJ4DURGhqoR8xsHzzpqMjLuxduFTILoJ911fXHV9lEfD SCRiHkWzM2AVvfAuRptcFAvwZeK31MlFP4CA6M81aJ5zyclzk5UGp5gHzkKLXeRcOiXaXS9gs2A 5RFYRLP+0u+3lkXQt+hOs5jw4vWmz5OeCESfxp+77SCrm+ktugFH0NG3GdNAAHYeT6uhnzugudP jppxtEBculH8qftlxoiraQk7NCcRnVVWW9vjTxwhZRCl24Gf/obyhORsITZPqKnKQOSVgQMD12b ROsgzccgXvvP/dd7KmA== X-Authority-Analysis: v=2.4 cv=OfcNnRTY c=1 sm=1 tr=0 ts=6ac61538 cx=c_pps a=HLyN3IcIa5EE8TELMZ618Q==:117 a=4s3hRJSeHn4rkQlkrse1kQ==:17 a=IkcTkHD0fZMA:10 a=660iZSQnnn4A:10 a=M51BFTxLslgA:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=u7WPNUs3qKkmUXheDGA7:22 a=ZpdpYltYx_vBUK5n70dp:22 a=pGLkceISAAAA:8 a=EUspDBNiAAAA:8 a=KKAkSRfTAAAA:8 a=YEB5RgzmAAAA:8 a=BYMmWKsKsDm6Gxpir0kA:9 a=3ZKOabzyN94A:10 a=QEXdDO2ut3YA:10 a=bTQJ7kPSJx9SKPbeHEYW:22 a=cvBusfyB2V15izCimMoJ:22 X-Proofpoint-GUID: yxp69vDFwPyrim_-NuSVjINIy51is6c9 X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1176,Hydra:6.1.134,FMLib:17.12.100.49 definitions=2026-10-07_03,2026-10-06_03,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 phishscore=0 spamscore=0 malwarescore=0 bulkscore=0 clxscore=1015 adultscore=0 lowpriorityscore=0 suspectscore=0 impostorscore=0 priorityscore=1501 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2609040000 definitions=main-2610070038 Received-SPF: pass client-ip=205.220.180.131; envelope-from=philmd@oss.qualcomm.com; helo=mx0b-0031df01.pphosted.com X-Spam_score_int: -27 X-Spam_score: -2.8 X-Spam_bar: -- X-Spam_report: (-2.8 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_LOW=-0.7, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org From: Yonggang Luo Name RX exception vectors and trap ranges, and use the definitions throughout exception handling and exception raising. Assert that exception indexes remain within the defined range before accessing their vector tables. Signed-off-by: Yonggang Luo Co-developed-by: Philippe Mathieu-Daudé Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Peter Maydell Reviewed-by: Yoshinori Sato --- target/rx/cpu.h | 13 +++++++++++++ target/rx/helper.c | 21 +++++++++++---------- target/rx/op_helper.c | 10 +++++----- target/rx/translate.c | 2 +- 4 files changed, 30 insertions(+), 16 deletions(-) diff --git a/target/rx/cpu.h b/target/rx/cpu.h index 64ba48a7329..0d9f4898a26 100644 --- a/target/rx/cpu.h +++ b/target/rx/cpu.h @@ -71,6 +71,19 @@ enum { NUM_REGS = 16, }; +#define RX_EXCP_TRAP_COUNT 0x100 + +enum { + RX_EXCP_PRIVILEGE_VIOLATION = 20, + RX_EXCP_ACCESS = 21, + RX_EXCP_ILLEGAL_INSTRUCTION = 23, + RX_EXCP_FPU = 25, + RX_EXCP_NMI = 30, + RX_EXCP_TRAP_BASE = 0x100, /* Up to RX_EXCP_TRAP_COUNT */ +}; + +#define RX_EXCP_COUNT (RX_EXCP_TRAP_BASE + RX_EXCP_TRAP_COUNT) + typedef struct CPUArchState { /* CPU registers */ uint32_t regs[NUM_REGS]; /* general registers */ diff --git a/target/rx/helper.c b/target/rx/helper.c index 0f99279bbaa..bc76dd28ab3 100644 --- a/target/rx/helper.c +++ b/target/rx/helper.c @@ -86,13 +86,14 @@ void rx_cpu_do_interrupt(CPUState *cs) env->isp -= 4; cpu_stl_le_data(env, env->isp, env->pc); - if (vec < 0x100) { - env->pc = cpu_ldl_le_data(env, 0xffffff80 + vec * 4); - } else { + assert(vec < RX_EXCP_COUNT); + if (vec >= RX_EXCP_TRAP_BASE) { env->pc = cpu_ldl_le_data(env, env->intb + (vec & 0xff) * 4); + } else { + env->pc = cpu_ldl_le_data(env, 0xffffff80 + vec * 4); } - if (vec == 30) { + if (vec == RX_EXCP_NMI) { /* Non-maskable interrupt */ qemu_plugin_vcpu_interrupt_cb(cs, last_pc); } else { @@ -100,22 +101,22 @@ void rx_cpu_do_interrupt(CPUState *cs) } switch (vec) { - case 20: + case RX_EXCP_PRIVILEGE_VIOLATION: expname = "privilege violation"; break; - case 21: + case RX_EXCP_ACCESS: expname = "access exception"; break; - case 23: + case RX_EXCP_ILLEGAL_INSTRUCTION: expname = "illegal instruction"; break; - case 25: + case RX_EXCP_FPU: expname = "fpu exception"; break; - case 30: + case RX_EXCP_NMI: expname = "non-maskable interrupt"; break; - case 0x100 ... 0x1ff: + case RX_EXCP_TRAP_BASE ... RX_EXCP_TRAP_BASE + RX_EXCP_TRAP_COUNT - 1: expname = "unconditional trap"; } qemu_log_mask(CPU_LOG_INT, "exception 0x%02x [%s] raised\n", diff --git a/target/rx/op_helper.c b/target/rx/op_helper.c index 6782912247e..d4e9ac2f192 100644 --- a/target/rx/op_helper.c +++ b/target/rx/op_helper.c @@ -115,7 +115,7 @@ static void update_fpsw(CPURXState *env, float32 ret, uintptr_t retaddr) enable = FIELD_EX32(env->fpsw, FPSW, ENABLE); enable |= 1 << 5; /* CE always enabled */ if (cause & enable) { - raise_exception(env, 21, retaddr); + raise_exception(env, RX_EXCP_ACCESS, retaddr); } } } @@ -432,17 +432,17 @@ void raise_exception(CPURXState *env, int index, G_NORETURN void helper_raise_privilege_violation(CPURXState *env) { - raise_exception(env, 20, GETPC()); + raise_exception(env, RX_EXCP_PRIVILEGE_VIOLATION, GETPC()); } G_NORETURN void helper_raise_access_fault(CPURXState *env) { - raise_exception(env, 21, GETPC()); + raise_exception(env, RX_EXCP_ACCESS, GETPC()); } G_NORETURN void helper_raise_illegal_instruction(CPURXState *env) { - raise_exception(env, 23, GETPC()); + raise_exception(env, RX_EXCP_ILLEGAL_INSTRUCTION, GETPC()); } G_NORETURN void helper_wait(CPURXState *env) @@ -457,5 +457,5 @@ G_NORETURN void helper_wait(CPURXState *env) G_NORETURN void helper_trap(CPURXState *env, uint32_t vec) { - raise_exception(env, 0x100 + vec, 0); + raise_exception(env, RX_EXCP_TRAP_BASE + vec, 0); } diff --git a/target/rx/translate.c b/target/rx/translate.c index d0910fbf8e7..1bacc7adf92 100644 --- a/target/rx/translate.c +++ b/target/rx/translate.c @@ -2187,7 +2187,7 @@ static bool trans_BRK(DisasContext *ctx, arg_BRK *a) /* int #imm */ static bool trans_INT(DisasContext *ctx, arg_INT *a) { - tcg_debug_assert(a->imm < 0x100); + tcg_debug_assert(a->imm < RX_EXCP_TRAP_COUNT); return do_trap(ctx, a->imm); } -- 2.55.0