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[88.187.86.199]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-4a17f54a650sm53925465e9.4.2026.10.07.02.48.24 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Wed, 07 Oct 2026 02:48:24 -0700 (PDT) From: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: Richard Henderson , Paolo Bonzini , Peter Maydell , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= Subject: [PATCH 26/27] target/tricore: Implement and register CPUClass::exception_name() Date: Wed, 7 Oct 2026 11:45:14 +0200 Message-ID: <20261007094516.75732-27-philmd@oss.qualcomm.com> X-Mailer: git-send-email 2.55.0 In-Reply-To: <20261007094516.75732-1-philmd@oss.qualcomm.com> References: <20261007094516.75732-1-philmd@oss.qualcomm.com> MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-Proofpoint-GUID: CAcKcY0jqSyRk5BxKQ6Zs5qxVQzXLA0_ X-Proofpoint-Spam-Info: AW1haW4tMjYxMDA3MDAzOCBTYWx0ZWRfXwxW6MHjmpSdG KUFcwtTDH9sB/hyFR0RE5RwZ90/qsbjQhQ/ZIc5YmHNIFAcfk/YQ6C0bIpXy+eG06XH/icfCKW4 q9oMJAMmVofd4XGo1K+ouMBLbGu43ek= X-Authority-Analysis: v=2.4 cv=XZYcX455 c=1 sm=1 tr=0 ts=6ac6156a cx=c_pps a=hnmNkyzTK/kJ09Xio7VxxA==:117 a=4s3hRJSeHn4rkQlkrse1kQ==:17 a=IkcTkHD0fZMA:10 a=660iZSQnnn4A:10 a=M51BFTxLslgA:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=u7WPNUs3qKkmUXheDGA7:22 a=rJkE3RaqiGZ5pbrm-msn:22 a=EUspDBNiAAAA:8 a=M3mzNYHUzacmDIfs9B8A:9 a=3ZKOabzyN94A:10 a=QEXdDO2ut3YA:10 a=PEH46H7Ffwr30OY-TuGO:22 X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYxMDA3MDAzOCBTYWx0ZWRfX/morIoQ68h1y VraE3bmeUxtzHlO2M5uX+/AQLPktY3Asn8CN6u2QmwFTIs7aouLUkunACzSgqqwBtUXpNhePska RM/BVhOVG9cxS0GZCLJsQAHQw0fYFlPN2fB/l1DS7XYvgkPb21TIBfV7ew2xB2JeT491HIkDQEX XZxosV70rYRnS9iPgP2OH84CiVqzRY89cO4ok16WrxrZrcvTNzZsCeUAGui5Bp3hUnJZPxH+eta 6KUt1ueWqTIKhEcAyefW47Rsfwd4PJE8qek6+3iu8EG2TuAYl6XiTcyB1t8OM2zDk1ru/OUwPzh rK71n6I80KiKfZ19b8Anmiw98ObMDZDOmv+QpLYNu1wuBIJbcf7/JuTgVxt3zsxs2TuxhLIZfkN 2nbAJbbevS/zreW5kllM3suKdVZrzmw/3ULmKGCpyqK1KjCTxTx1zKQ2YviNyeNaxlO6lji/EKx ApY8qb3L7wtlOzQu8Xw== X-Proofpoint-ORIG-GUID: CAcKcY0jqSyRk5BxKQ6Zs5qxVQzXLA0_ X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1176,Hydra:6.1.134,FMLib:17.12.100.49 definitions=2026-10-07_03,2026-10-06_03,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 malwarescore=0 priorityscore=1501 impostorscore=0 bulkscore=0 suspectscore=0 clxscore=1015 phishscore=0 adultscore=0 spamscore=0 lowpriorityscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2609040000 definitions=main-2610070038 Received-SPF: pass client-ip=205.220.180.131; envelope-from=philmd@oss.qualcomm.com; helo=mx0b-0031df01.pphosted.com X-Spam_score_int: -27 X-Spam_score: -2.8 X-Spam_bar: -- X-Spam_report: (-2.8 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_LOW=-0.7, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Implement tricore_trap_name() and register it as the CPUClass::exception_name() handler, so the common exception logging can resolve TriCore trop numbers to names. Signed-off-by: Philippe Mathieu-Daudé --- target/tricore/cpu.h | 2 ++ target/tricore/cpu.c | 21 +++++++++++++++++++++ 2 files changed, 23 insertions(+) diff --git a/target/tricore/cpu.h b/target/tricore/cpu.h index 12e497d2a7a..fb8d2fd1011 100644 --- a/target/tricore/cpu.h +++ b/target/tricore/cpu.h @@ -178,6 +178,8 @@ enum { TRAPC_IRQ = 8 }; +const char *tricore_trap_name(int trap); + /* Class 0 TIN */ enum { TIN0_VAF = 0, diff --git a/target/tricore/cpu.c b/target/tricore/cpu.c index 84a05e3d363..d550b8b0b8e 100644 --- a/target/tricore/cpu.c +++ b/target/tricore/cpu.c @@ -36,6 +36,26 @@ static const gchar *tricore_gdb_arch_name(CPUState *cs) return "tricore"; } +const char *tricore_trap_name(int trap) +{ + static const char * const trap_names[] = { + [TRAPC_MMU] = "mmu", + [TRAPC_PROT] = "prot", + [TRAPC_INSN_ERR] = "insn err", + [TRAPC_CTX_MNG] = "ctx mng", + [TRAPC_SYSBUS] = "sysbus", + [TRAPC_ASSERT] = "assert", + [TRAPC_SYSCALL] = "syscall", + [TRAPC_NMI] = "NMI", + [TRAPC_IRQ] = "IRQ", + }; + + if (trap < 0 || trap >= ARRAY_SIZE(trap_names) || !trap_names[trap]) { + return "unknown"; + } + return trap_names[trap]; +} + static void tricore_disas_set_info(const CPUState *cpu, disassemble_info *info) { CPUTriCoreState *env = cpu_env((CPUState *)cpu); @@ -240,6 +260,7 @@ static void tricore_cpu_class_init(ObjectClass *c, const void *data) resettable_class_set_parent_phases(rc, NULL, tricore_cpu_reset_hold, NULL, &mcc->parent_phases); cc->class_by_name = tricore_cpu_class_by_name; + cc->exception_name = tricore_trap_name; cc->gdb_read_register = tricore_cpu_gdb_read_register; cc->gdb_write_register = tricore_cpu_gdb_write_register; -- 2.55.0