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Signed-off-by: Philippe Mathieu-Daudé --- target/arm/cpu.h | 2 ++ target/arm/cpu.c | 1 + target/arm/helper.c | 79 +++++++++++++++++++++++---------------------- 3 files changed, 43 insertions(+), 39 deletions(-) diff --git a/target/arm/cpu.h b/target/arm/cpu.h index 06ebed4a8fd..b4b4ca52d19 100644 --- a/target/arm/cpu.h +++ b/target/arm/cpu.h @@ -67,6 +67,8 @@ #define EXCP_MON_TRAP 29 /* AArch32 trap to Monitor mode */ /* NB: add new EXCP_ defines to the array in arm_log_exception() too */ +const char *arm_exception_name(int excp); + #define ARMV7M_EXCP_RESET 1 #define ARMV7M_EXCP_NMI 2 #define ARMV7M_EXCP_HARD 3 diff --git a/target/arm/cpu.c b/target/arm/cpu.c index 10ac6c98318..b12bb07b59b 100644 --- a/target/arm/cpu.c +++ b/target/arm/cpu.c @@ -2647,6 +2647,7 @@ static void arm_cpu_class_init(ObjectClass *oc, const void *data) &acc->parent_phases); cc->class_by_name = arm_cpu_class_by_name; + cc->exception_name = arm_exception_name; cc->dump_state = arm_cpu_dump_state; cc->set_pc = arm_cpu_set_pc; cc->get_pc = arm_cpu_get_pc; diff --git a/target/arm/helper.c b/target/arm/helper.c index ff0b766b73d..94c05121214 100644 --- a/target/arm/helper.c +++ b/target/arm/helper.c @@ -8802,46 +8802,8 @@ void arm_log_exception(CPUState *cs) int idx = cs->exception_index; if (qemu_loglevel_mask(CPU_LOG_INT)) { - const char *exc = NULL; - static const char * const excnames[] = { - [EXCP_UDEF] = "Undefined Instruction", - [EXCP_SWI] = "SVC", - [EXCP_PREFETCH_ABORT] = "Prefetch Abort", - [EXCP_DATA_ABORT] = "Data Abort", - [EXCP_IRQ] = "IRQ", - [EXCP_FIQ] = "FIQ", - [EXCP_BKPT] = "Breakpoint", - [EXCP_EXCEPTION_EXIT] = "QEMU v7M exception exit", - [EXCP_KERNEL_TRAP] = "QEMU intercept of kernel commpage", - [EXCP_HVC] = "Hypervisor Call", - [EXCP_HYP_TRAP] = "Hypervisor Trap", - [EXCP_SMC] = "Secure Monitor Call", - [EXCP_VIRQ] = "Virtual IRQ", - [EXCP_VFIQ] = "Virtual FIQ", - [EXCP_SEMIHOST] = "Semihosting call", - [EXCP_NOCP] = "v7M NOCP UsageFault", - [EXCP_INVSTATE] = "v7M INVSTATE UsageFault", - [EXCP_STKOF] = "v8M STKOF UsageFault", - [EXCP_LAZYFP] = "v7M exception during lazy FP stacking", - [EXCP_LSERR] = "v8M LSERR UsageFault", - [EXCP_UNALIGNED] = "v7M UNALIGNED UsageFault", - [EXCP_DIVBYZERO] = "v7M DIVBYZERO UsageFault", - [EXCP_VSERR] = "Virtual SERR", - [EXCP_GPC] = "Granule Protection Check", - [EXCP_NMI] = "NMI", - [EXCP_VINMI] = "Virtual IRQ NMI", - [EXCP_VFNMI] = "Virtual FIQ NMI", - [EXCP_MON_TRAP] = "Monitor Trap", - }; - - if (idx >= 0 && idx < ARRAY_SIZE(excnames)) { - exc = excnames[idx]; - } - if (!exc) { - exc = "unknown"; - } qemu_log_mask(CPU_LOG_INT, "Taking exception %d [%s] on CPU %d\n", - idx, exc, cs->cpu_index); + idx, arm_exception_name(idx), cs->cpu_index); } } @@ -9928,6 +9890,45 @@ void arm_cpu_do_interrupt(CPUState *cs) } #endif /* !CONFIG_USER_ONLY */ +const char *arm_exception_name(int excp) +{ + static const char * const excnames[] = { + [EXCP_UDEF] = "Undefined Instruction", + [EXCP_SWI] = "SVC", + [EXCP_PREFETCH_ABORT] = "Prefetch Abort", + [EXCP_DATA_ABORT] = "Data Abort", + [EXCP_IRQ] = "IRQ", + [EXCP_FIQ] = "FIQ", + [EXCP_BKPT] = "Breakpoint", + [EXCP_EXCEPTION_EXIT] = "QEMU v7M exception exit", + [EXCP_KERNEL_TRAP] = "QEMU intercept of kernel commpage", + [EXCP_HVC] = "Hypervisor Call", + [EXCP_HYP_TRAP] = "Hypervisor Trap", + [EXCP_SMC] = "Secure Monitor Call", + [EXCP_VIRQ] = "Virtual IRQ", + [EXCP_VFIQ] = "Virtual FIQ", + [EXCP_SEMIHOST] = "Semihosting call", + [EXCP_NOCP] = "v7M NOCP UsageFault", + [EXCP_INVSTATE] = "v7M INVSTATE UsageFault", + [EXCP_STKOF] = "v8M STKOF UsageFault", + [EXCP_LAZYFP] = "v7M exception during lazy FP stacking", + [EXCP_LSERR] = "v8M LSERR UsageFault", + [EXCP_UNALIGNED] = "v7M UNALIGNED UsageFault", + [EXCP_DIVBYZERO] = "v7M DIVBYZERO UsageFault", + [EXCP_VSERR] = "Virtual SERR", + [EXCP_GPC] = "Granule Protection Check", + [EXCP_NMI] = "NMI", + [EXCP_VINMI] = "Virtual IRQ NMI", + [EXCP_VFNMI] = "Virtual FIQ NMI", + [EXCP_MON_TRAP] = "Monitor Trap", + }; + + if (excp < 0 || excp >= ARRAY_SIZE(excnames) || !excnames[excp]) { + return "unknown"; + } + return excnames[excp]; +} + uint64_t arm_sctlr(CPUARMState *env, int el) { /* Only EL0 needs to be adjusted for EL1&0 or EL2&0 or EL3&0 */ -- 2.55.0