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Miller" , Eric Dumazet , Paolo Abeni , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Heiko Stuebner , Maxime Chevallier , Maxime Coquelin , Alexandre Torgue , Heiner Kallweit , Russell King , David Wu , linux-rockchip@lists.infradead.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, Coia Prant Subject: [PATCH net-next v11 0/6] net: pcs: add basic support for RK3568 XPCS Date: Fri, 9 Oct 2026 01:51:54 +0800 Message-ID: <20261008175225.3375274-1-coiaprant@gmail.com> X-Mailer: git-send-email 2.47.3 Precedence: bulk X-Mailing-List: netdev@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit This series adds proper SGMII support for the Rockchip RK3568 SoC using the integrated Synopsys DesignWare XPCS, along with necessary fixes and refactoring in the stmmac core and XPCS driver. Motivation ========== The RK3568 integrates a DW XPCS accessed via APB3 and connected to a Naneng Combo SerDes PHY. Several boards (e.g., Ariaboard Photonicat) use this interface for Gigabit Ethernet. However, the current upstream stmmac driver does not support this configuration, and the XPCS driver has issues in SGMII poll mode that cause the link to be reported incorrectly. This series addresses these issues by: - Adding ANRESTART support for SGMII link recovery - Adding a Rockchip XPCS platform glue driver and wiring it up in dwmac-rk Series overview =============== RK3568 XPCS/SGMII: Patch 1: add ANRESTART support for SGMII link recovery Patch 2: DT binding for Rockchip RK3568 XPCS Patch 3: implement the Rockchip XPCS platform glue driver Patch 4: DT binding for Rockchip DWMAC PCS Patch 5: wire up SGMII support in dwmac-rk Patch 6: update MAINTAINERS Dependencies ============ - Generic PM domain (genpd) changes: https://lore.kernel.org/all/20260925041751.495818-1-coiaprant@gmail.com/ - PHY binding+driver (Naneng Combo PHY SGMII MAC selection): https://lore.kernel.org/all/20261006162807.2843858-1-coiaprant@gmail.com/ - stmmac XPCS lifetime management fix: https://lore.kernel.org/all/20261005221749.1104430-1-coiaprant@gmail.com/ The DTS changes using the PHY property are sent separately to Heiko/linux-rockchip. There is no hard build dependency; the pieces can converge during the merge window. Changelog ========= Changes since v10: - XPCS binding: drop the ethernet-pcs-mii child nodes and the phy-names property. The MII port used by SGMII is derived from the MAC it is routed to (GMAC0 -> port 0, GMAC1 -> port 1), so the ports do not need to be described. - dwmac binding: require phy-mode for rockchip,rk3568-gmac, and require pcs-handle only when phy-mode is "sgmii". Without the explicit required: [ phy-mode ], the "if" would match even when phy-mode is absent (Rob). - XPCS glue driver: use pdev->dev.links.status instead of link->supplier->links.status, and drop the unused reg argument from the read remapping helper. - dwmac-rk: document that the MII port passed to xpcs_rk_create() is the GMAC id, matching the hardware routing. Rewrite the in-band vs out-of-band section of the commit message to match the driver behavior and the actual clock rates. - DTS: drop the ethernet-pcs-mii sub-nodes; pcs-handle now points at the XPCS node itself. - Commit messages updated. Key design decisions ==================== - The stmmac core now delegates XPCS creation entirely to platform drivers via pcs_init/pcs_exit. This is necessary because the generic XPCS creation logic would override any XPCS set up by the platform driver. - The Rockchip XPCS driver creates a virtual MDIO bus over the APB3 registers and implements address remapping. The generic XPCS core handles all PCS configuration via phylink_pcs_ops. - On RK3568 in SGMII mode, the MAC clock is fixed at 125 MHz and cannot be dynamically changed. In-band mode is used, and the generic stmmac set_clk_tx_rate callback is disabled to prevent incorrect clock updates that would break RX. - The SerDes and power domain are attached to the XPCS device tree node rather than the MAC node. This reflects the actual hardware topology and simplifies the dwmac-rk driver by keeping all PCS-related resources self-contained. It also prepares for possible future QSGMII support, where a single SerDes serves multiple MACs and would be more naturally managed under the XPCS node. Testing ======= Board: Ariaboard Photonicat (RK3568) OS: Armbian (trixie) Kernel: 6.18 (backports) Result: The SGMII interface obtains an IP address, SSH works, and ping traffic passes without loss. Notes ===== - When testing out-band mode with set_clk_tx_rate, only 1000Mbps works on both TX/RX; 10/100Mbps only works on TX side. Acknowledgments =============== This work was inspired by and builds upon the excellent work of others: - Serge Semin's Synopsys DesignWare XPCS platform driver (pcs-xpcs-plat.c) - Clément Léger's Renesas MIIC driver (pcs-rzn1-miic.c) - The Rockchip TRM and downstream OEM drivers Thanks in advance, Coia Prant --- Coia Prant (6): net: pcs: xpcs: add ANRESTART support for SGMII link recovery dt-bindings: net: pcs: add rockchip,rk3568-xpcs support net: pcs: xpcs: add Rockchip RK3568 platform glue driver dt-bindings: net: rockchip-dwmac: document pcs-handle net: stmmac: dwmac-rk: add SGMII support for RK3568 MAINTAINERS: add entry for Rockchip XPCS driver .../net/pcs/rockchip,rk3568-xpcs.yaml | 69 ++ .../bindings/net/rockchip-dwmac.yaml | 27 + MAINTAINERS | 9 + drivers/net/ethernet/stmicro/stmmac/Kconfig | 1 + .../net/ethernet/stmicro/stmmac/dwmac-rk.c | 131 +++- drivers/net/pcs/Kconfig | 25 + drivers/net/pcs/Makefile | 5 +- drivers/net/pcs/pcs-xpcs-rk.c | 598 ++++++++++++++++++ drivers/net/pcs/pcs-xpcs.c | 35 +- include/linux/pcs/pcs-xpcs-rk.h | 11 + 10 files changed, 883 insertions(+), 28 deletions(-) create mode 100644 Documentation/devicetree/bindings/net/pcs/rockchip,rk3568-xpcs.yaml create mode 100644 drivers/net/pcs/pcs-xpcs-rk.c create mode 100644 include/linux/pcs/pcs-xpcs-rk.h -- 2.47.3 From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id D1232CA600D for ; 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Miller" , Eric Dumazet , Paolo Abeni , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Heiko Stuebner , Maxime Chevallier , Maxime Coquelin , Alexandre Torgue , Heiner Kallweit , Russell King , David Wu , linux-rockchip@lists.infradead.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, Coia Prant Subject: [PATCH net-next v11 0/6] net: pcs: add basic support for RK3568 XPCS Date: Fri, 9 Oct 2026 01:51:54 +0800 Message-ID: <20261008175225.3375274-1-coiaprant@gmail.com> X-Mailer: git-send-email 2.47.3 MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.9.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20261008_105249_730092_7A7BB8AA X-CRM114-Status: GOOD ( 21.93 ) X-BeenThere: linux-rockchip@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: Upstream kernel work for Rockchip platforms List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: base64 Sender: "Linux-rockchip" Errors-To: linux-rockchip-bounces+linux-rockchip=archiver.kernel.org@lists.infradead.org VGhpcyBzZXJpZXMgYWRkcyBwcm9wZXIgU0dNSUkgc3VwcG9ydCBmb3IgdGhlIFJvY2tjaGlwIFJL MzU2OCBTb0MKdXNpbmcgdGhlIGludGVncmF0ZWQgU3lub3BzeXMgRGVzaWduV2FyZSBYUENTLCBh bG9uZyB3aXRoIG5lY2Vzc2FyeQpmaXhlcyBhbmQgcmVmYWN0b3JpbmcgaW4gdGhlIHN0bW1hYyBj b3JlIGFuZCBYUENTIGRyaXZlci4KCk1vdGl2YXRpb24KPT09PT09PT09PQpUaGUgUkszNTY4IGlu dGVncmF0ZXMgYSBEVyBYUENTIGFjY2Vzc2VkIHZpYSBBUEIzIGFuZCBjb25uZWN0ZWQgdG8KYSBO YW5lbmcgQ29tYm8gU2VyRGVzIFBIWS4gIFNldmVyYWwgYm9hcmRzIChlLmcuLCBBcmlhYm9hcmQK UGhvdG9uaWNhdCkgdXNlIHRoaXMgaW50ZXJmYWNlIGZvciBHaWdhYml0IEV0aGVybmV0LiAgSG93 ZXZlciwgdGhlCmN1cnJlbnQgdXBzdHJlYW0gc3RtbWFjIGRyaXZlciBkb2VzIG5vdCBzdXBwb3J0 IHRoaXMgY29uZmlndXJhdGlvbiwKYW5kIHRoZSBYUENTIGRyaXZlciBoYXMgaXNzdWVzIGluIFNH TUlJIHBvbGwgbW9kZSB0aGF0IGNhdXNlIHRoZQpsaW5rIHRvIGJlIHJlcG9ydGVkIGluY29ycmVj dGx5LgoKVGhpcyBzZXJpZXMgYWRkcmVzc2VzIHRoZXNlIGlzc3VlcyBieToKLSBBZGRpbmcgQU5S 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