[PATCH] drm/xe: Add wa_14028434957 to Graphics Version 35.11

[Varun Gupta <varun.gupta@intel.com>]

Prevent the SNIB AER latch from swallowing back-to-back uncorrectable
non-fatal errors.

Firmware bypasses the faulty AER path by routing these errors directly
via MSI. This patch intercepts the MSI and reuses the existing GFSP
error containment logic.

Because GFSP mailbox queries can sleep, handling is deferred to a
workqueue (nonfatal_msi_work) to ensure hardirq safety. If a reset is
required, the device is wedged (a stopgap until VR driver quiescing
support allows for an actual Secondary Bus Reset).

Assisted-by: LLM
Signed-off-by: Varun Gupta <varun.gupta@intel.com>
---
 drivers/gpu/drm/xe/xe_device_wa_oob.rules |  1 +
 drivers/gpu/drm/xe/xe_drm_ras_types.h     |  5 +++
 drivers/gpu/drm/xe/xe_hw_error.c          | 39 +++++++++++++++++++++++
 3 files changed, 45 insertions(+)

diff --git a/drivers/gpu/drm/xe/xe_device_wa_oob.rules b/drivers/gpu/drm/xe/xe_device_wa_oob.rules
index d8dc41851425..36b2567994db 100644
--- a/drivers/gpu/drm/xe/xe_device_wa_oob.rules
+++ b/drivers/gpu/drm/xe/xe_device_wa_oob.rules
@@ -7,3 +7,4 @@
 14026633728	PLATFORM(CRESCENTISLAND)
 14026746987	PLATFORM(CRESCENTISLAND)
 14026779378	PLATFORM(CRESCENTISLAND)
+14028434957	PLATFORM(CRESCENTISLAND)
diff --git a/drivers/gpu/drm/xe/xe_drm_ras_types.h b/drivers/gpu/drm/xe/xe_drm_ras_types.h
index 0be218ba2db7..7a35390a9ffd 100644
--- a/drivers/gpu/drm/xe/xe_drm_ras_types.h
+++ b/drivers/gpu/drm/xe/xe_drm_ras_types.h
@@ -9,6 +9,8 @@
 #include <linux/atomic.h>
 #include <drm/xe_drm.h>
 
+#include <linux/workqueue.h>
+
 struct drm_ras_node;
 
 /* Error categories reported by hardware */
@@ -46,6 +48,9 @@ struct xe_drm_ras {
 
 	/** @disable_vram_page_offline: cached configfs policy, immutable after init */
 	bool disable_vram_page_offline;
+
+	/** @nonfatal_msi_work: Worker to process uncorrectable non-fatal errors */
+	struct work_struct nonfatal_msi_work;
 };
 
 #endif
diff --git a/drivers/gpu/drm/xe/xe_hw_error.c b/drivers/gpu/drm/xe/xe_hw_error.c
index 5f2abc9485ff..847ca1ae411e 100644
--- a/drivers/gpu/drm/xe/xe_hw_error.c
+++ b/drivers/gpu/drm/xe/xe_hw_error.c
@@ -5,6 +5,8 @@
 
 #include <linux/bitmap.h>
 
+#include <drm/drm_managed.h>
+
 #include "regs/xe_gsc_regs.h"
 #include "regs/xe_hw_error_regs.h"
 #include "regs/xe_irq_regs.h"
@@ -14,7 +16,9 @@
 #include "xe_drm_ras.h"
 #include "xe_hw_error.h"
 #include "xe_mmio.h"
+#include "xe_ras.h"
 #include "xe_survivability_mode.h"
+#include "xe_wa.h"
 
 #define GT_HW_ERROR_MAX_ERR_BITS		16
 #define HEC_UNCORR_FW_ERR_BITS			4
@@ -173,6 +177,27 @@ static void csc_hw_error_work(struct work_struct *work)
 	xe_survivability_mode_runtime_enable(xe);
 }
 
+static void nonfatal_msi_work(struct work_struct *work)
+{
+	struct xe_drm_ras *ras = container_of(work, typeof(*ras), nonfatal_msi_work);
+	struct xe_device *xe = container_of(ras, typeof(*xe), ras);
+	enum xe_ras_recovery_action action = xe_ras_process_errors(xe);
+
+	/*
+	 * TODO: Request an SBR instead of wedging, once VR driver
+	 * quiescing support is in place.
+	 */
+	if (action != XE_RAS_RECOVERY_ACTION_RECOVERED)
+		xe_device_declare_wedged(xe);
+}
+
+static void hw_error_fini(struct drm_device *drm, void *arg)
+{
+	struct xe_device *xe = arg;
+
+	cancel_work_sync(&xe->ras.nonfatal_msi_work);
+}
+
 static void csc_hw_error_handler(struct xe_tile *tile, const enum hardware_error hw_err)
 {
 	const enum drm_xe_ras_error_severity severity = hw_err_to_severity(hw_err);
@@ -436,6 +461,15 @@ static void hw_error_source_handler(struct xe_tile *tile, const enum hardware_er
 	 * here for those platforms.
 	 */
 	if (xe->info.has_sysctrl) {
+		/*
+		 * Defer non-fatal MSI handling to process context because the GFSP
+		 * query can sleep.
+		 */
+		if (hw_err == HARDWARE_ERROR_NONFATAL && XE_DEVICE_WA(xe, 14028434957)) {
+			schedule_work(&xe->ras.nonfatal_msi_work);
+			return;
+		}
+
 		drm_err_ratelimited(&xe->drm, HW_ERR "Invalid error routing\n");
 		return;
 	}
@@ -546,6 +580,11 @@ void xe_hw_error_init(struct xe_device *xe)
 {
 	struct xe_tile *tile = xe_device_get_root_tile(xe);
 
+	INIT_WORK(&xe->ras.nonfatal_msi_work, nonfatal_msi_work);
+
+	if (drmm_add_action_or_reset(&xe->drm, hw_error_fini, xe))
+		drm_err(&xe->drm, "Failed to register hw_error_fini\n");
+
 	if (!IS_DGFX(xe) || IS_SRIOV_VF(xe))
 		return;
 
-- 
2.43.0