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dmarc=pass (p=quarantine dis=none) header.from=kernel.org Authentication-Results: smtp1.osuosl.org; dkim=pass (2048-bit key, unprotected) header.d=kernel.org header.i=@kernel.org header.a=rsa-sha256 header.s=k20260515 header.b=Zhlur4zA Received: from tor.source.kernel.org (tor.source.kernel.org [172.105.4.254]) by smtp1.osuosl.org (Postfix) with ESMTPS id 987EC8146E for ; Sat, 10 Oct 2026 08:45:51 +0000 (UTC) Received: from smtp.kernel.org (quasi.space.kernel.org [100.103.45.18]) by tor.source.kernel.org (Postfix) with ESMTP id 1AB54601F7; Sat, 10 Oct 2026 08:45:49 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 46C901F000FF; Sat, 10 Oct 2026 08:45:48 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=kernel.org; s=k20260515; t=1791621948; bh=3d/rO+dzhupKcjZBpvjANfva2JRwAsEJ0FFOivDLZkg=; h=Date:From:To:Cc:Subject:References:In-Reply-To; b=Zhlur4zAeca6KcBFYIIzLkjaYhdBsqL0nH3uPQvYsdga+ZbhG4/B90i3SCNKw9+5S U30V4m7E39J26lWbVUI9HKE/AshHN5b040lO2zMqwTBJnZH03BKOsdzSu4R/XSEjO/ /YYEsSBXzRaY19XAytsTth/aEah3PKE26NSLf5f7cbSnHzaaI3YNeXPwgKYMY3w0EY zffJ9vmTbLwaVnNMSD+YjqfUAu1XcYvbLSqz9c+z2v29iYDRLDl4KsFNVcx5yul10X V09OKkxAWKUt7aKTqGYwGTq9+6PMwFCOjAE89iJ0CWtMPHQO+cvCWveb3xNkFHchNv V4Ode2vE2wR/A== Date: Sat, 10 Oct 2026 08:45:45 +0000 From: Yixun Lan To: Dave Klotz Cc: Eric Chung , Peng Fan , u-boot@lists.u-boot-project.org, Jaehoon Chung , Tanmay Kathpalia , Tom Rini Subject: Re: [PATCH v2 1/3] mmc: k1: handle a missing max-frequency and clk_set_rate()'s return value Message-ID: <20261010084545-GKD26088@kernel.org> References: <20261005T134748-0400.mmc-v2-cover.DaveWK225@protonmail.com> <20261005T135220-0400.mmc-v2-0001.DaveWK225@protonmail.com> MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Disposition: inline In-Reply-To: <20261005T135220-0400.mmc-v2-0001.DaveWK225@protonmail.com> X-BeenThere: u-boot@lists.u-boot-project.org X-Mailman-Version: 2.1.30 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.u-boot-project.org Hi Dave, On 17:55 Mon 05 Oct , Dave Klotz wrote: > The driver sets the io clock to the max-frequency the device tree gives > and fails the probe on any non-zero return from clk_set_rate(). Two > problems follow: > I can understand your problem and what to solve.. but wouldn't it be a more simpler way to just setting max-frequency? currently, only two boards are supported in mainline uboot: k1-bananapi-f3 k1-musepi-pro so, you likely also need to add a customized u-boot dtsi file for supporting OrangePi R2S, something as file below, where setting the max-frequency property arch/riscv/dts/k1-bananapi-f3-u-boot.dtsi > - clk_set_rate() returns the new rate on success and a negative error > code on failure. The SpacemiT clock driver happens to return 0, but > any clock driver that reports the rate makes the probe fail. Could you elaborate a bit "happens to return 0, ..probe fail" ? > - A node without max-frequency asks for 0 Hz. On the K1 clock driver A node with DT property get 0 Hz - that's expected behavior > that picks no divider at all and writes whatever the calculation left > behind into the io clock's divider field; host->max_clk is then 0, > the capabilities register gives no base clock either, and the probe > fails in sdhci_setup_cfg(). I occur to me, we should further check these logic, like a rate = 0 input for clk subsystem - clk_set_rate(, 0) is actually a valid case? also if need to set host->max_clk .. > > Treat only a negative return as an error. Without max-frequency, leave > the io clock as an earlier stage set it and run from its current rate. > > Signed-off-by: Dave Klotz > > Changes in v2: > - Use ulong and IS_ERR_VALUE() for the clock API return values. > - Validate clk_get_rate() before narrowing to cfg.f_max and retain the error. > > --- > drivers/mmc/spacemit_sdhci.c | 28 ++++++++++++++++++++++++---- > 1 file changed, 24 insertions(+), 4 deletions(-) > > diff --git a/drivers/mmc/spacemit_sdhci.c b/drivers/mmc/spacemit_sdhci.c > index f5578f38bd..6488ae0fdb 100644 > --- a/drivers/mmc/spacemit_sdhci.c > +++ b/drivers/mmc/spacemit_sdhci.c > @@ -606,10 +606,30 @@ > goto err_reset; > } > > - ret = clk_set_rate(&clk, plat->cfg.f_max); > - if (ret) { > - log_err("Failed to set io clk: %d\n", ret); > - goto err_reset; > + /* > + * Without max-frequency there is no rate to ask for: leave the io > + * clock as an earlier stage set it and run from its current rate. The I'm wondering if we could set a sane default max-frequency if no DT property provided? as we can't always trust previous earlier stage which may in an undetermined state, it will be fragile and easy to fail.. > + * capabilities register gives no base clock on the K1, so it cannot > + * stand in. clk_set_rate() returns the new rate on success, so only a > + * negative value is an error. > + */ > + if (plat->cfg.f_max) { > + ulong rate = clk_set_rate(&clk, plat->cfg.f_max); > + > + if (IS_ERR_VALUE(rate)) { > + ret = (int)rate; > + log_err("Failed to set io clk: %d\n", ret); > + goto err_reset; > + } > + } else { > + ulong rate = clk_get_rate(&clk); > + > + if (IS_ERR_VALUE(rate) || !rate) { > + ret = rate ? (int)rate : -EINVAL; > + log_err("No max-frequency and no io clk rate\n"); > + goto err_reset; > + } > + plat->cfg.f_max = rate; > } > > /* Set quirks */ > -- > 2.55.0 > -- Yixun Lan (dlan)