From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mail-wr1-f53.google.com (mail-wr1-f53.google.com [209.85.221.53]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 1EFEA494800 for ; Sat, 10 Oct 2026 11:56:06 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.221.53 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1791633368; cv=none; b=ceVG5VpgtP4eNjBtLHMYHKu13bOfD1fF3tGkmyvyIP50a4F+G5zNOPQ4wqMfoc1Qdf/pgHIoBxv/CAoA5sTuIy1dKjjKFa8i87si00BLlD3+MXHrp85eGfb+fm4pcNHwhZvXOSyGaExdx9h36tSlMkWx/9uLASJr/IrishayYKk= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1791633368; c=relaxed/simple; bh=oWOjt1/BP/ZrdTdhWqbWJnrKsyEqrYi+/tyFuMPW57g=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=tIgtHPjocFTcBA7zbYgYx9pL/rdpcipWIlcRrCL0/nTTznC240Bmt5pvFXVlDbyGjo+y2mHT6B6Smt2p6H4X+g55p0EX6CWl6Bq8S/xjD4LLsP5aF/UBG2n2TaAWTKuRKzzvKV+r+F9JdBUJ/kVZTsUGiQSkGch7hJvO7KGmnnY= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com; spf=pass smtp.mailfrom=gmail.com; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b=UnmrbSx4; arc=none smtp.client-ip=209.85.221.53 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=gmail.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="UnmrbSx4" Received: by mail-wr1-f53.google.com with SMTP id ffacd0b85a97d-48870973bddso296110f8f.1 for ; Sat, 10 Oct 2026 04:56:06 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20251104; t=1791633365; x=1792238165; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to:content-type; bh=Qv9bAeFxVCYRZjcdo00nj7An4pwjaNEncFgD0tELhn8=; b=UnmrbSx4gwCsF6GeA3tG7jLc9IjrJin8eP5Ex1FFWcTOsnL02w8GVhG09VYoz/vRPS BKfUIF5k+DD4gOUmz2TTfxUpiAbj6ib8uK9MRnEwzIPuuQedEprfE0oPq4m2aMujrkTp t6BVKVyjWYCHYv1FbSTH6J0wZtiO7sz2boIuZ+9LFuTKjuv7+z60mRO7DkVk62RJYRHd hCBn158uaBHGcYqRMwcUG1GW7cvgtayeUdetUW6P1FpNuhX03vVWfwMyl9Sw4YL7AZNa +odSCtIp1DTPqc54Rfad/NUiJVw6658nFgtriLX88ZcOUK3mrmk3UoVYxfS1DQ+V8Ank Hf1w== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20260707; t=1791633365; x=1792238165; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-gg:x-gm-message-state:from :to:cc:subject:date:message-id:reply-to:content-type; bh=Qv9bAeFxVCYRZjcdo00nj7An4pwjaNEncFgD0tELhn8=; b=FreRnT0MNb7XqlNfrT84QvWGs5eYAW+/17uibQInZf+adFz+lrvipgnSxbROLcbN08 BrAvd5m0X9dKApD8VB7TwKlNNv2SWgIChkzlniL7JRgtmc+O33ttFSHJf9MaEqlz6neR FCLZ3b+5+zAHmcqcGCQALDWReNW/hqrj41khidcBEntn0v/aF1WYluFanCXUQ+1zafXN 0RdiphhkYx67IeLWZIluHyJMy7Gk0/2APkYUTrPaK8Db+zspxMcp6nTLi/FAfoqliCLh rgOtQ90O5tu+D+S5u72Qouc7LTQZzcwgIGGgdF3Tv5YuaaoPsWctuW4jBplKQMxZUD8D W0lw== X-Forwarded-Encrypted: i=1; AKwUvBwd3ebohmJ80KwAZyyyPo5DCPGy5gGoSr5TO3oNxiV7Dt4o3oqmMfBfxsIIcQ14lE7f4akmhwDIEqE=@vger.kernel.org X-Gm-Message-State: AFq9FYIge/lMTBWFFXtVF4GamwXG0/AATrjlWPxLGIW8qU3n7ioWirEB JZrMZ4WZL3VefObmyMj8bbKHzNyZsq0f4I6yBJDwlsXGVp9CS4zqVCzn X-Gm-Gg: AYBFou0S6yH4t4+s9+vcjXr9aqJi7P+IHgwSZVQguq0UMN3QuQKlGxjqAhROK4SQnEA PyivPFOc6VvTnZ6q4xzawi3od/T46lZQ3+1UjpC9i0CyheYIMLGKYU0UJWkEAcE0a43WHLapu4H ntOXSwU7yKpuXfXP2e0bEHVJTFMpcIpG5Usbr7lbe2/eUCCtCqZpsAAhyUtP23jkMl37nsT85xW Vld0rKDJJgyVUBMQjxZSJfzSDgAxSRn1g9u4aG6HIERwy4sRD2RXPMzRQcX5t/3MVoPVrrRSeSY 6c6CwUaetC0vbtuAFL5zlCLMobrwcIaHMlmYTqxDh1iC7AV0fcm2bs7T64I55QbCuJqmU1l6KxQ OL8uoINL18VbYBxx6Rnfmzh9Gd3ATeeeslFyA1utid3U8OSKv7IN5mZOSqkPZ8jwonfJp+MWhrr XmZMusrGUZdmjXnt10bxeIZi6VfqviBOlyhyYhPNuTBTEmB4amP8BSiRq92VHpLrzmKA== X-Received: by 2002:adf:e00b:0:10b0:48a:fff3:f9c1 with SMTP id ffacd0b85a97d-48db9482030mr6898560f8f.20.1791633364955; Sat, 10 Oct 2026 04:56:04 -0700 (PDT) Received: from luca-vm.lan ([154.61.61.58]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-48db9aca657sm8746340f8f.43.2026.10.10.04.56.03 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 10 Oct 2026 04:56:04 -0700 (PDT) From: Luca Leonardo Scorcia To: linux-mediatek@lists.infradead.org Cc: Luca Leonardo Scorcia , Chunfeng Yun , Vinod Koul , Neil Armstrong , Manivannan Sadhasivam , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Matthias Brugger , AngeloGioacchino Del Regno , Stephen Boyd , Brian Masney , Jerome Brunet , Chun-Kuang Hu , Philipp Zabel , David Airlie , Simona Vetter , Nicolas Frattaroli , Chen-Yu Tsai , Fabien Parent , chunhui dai , CK Hu , linux-arm-kernel@lists.infradead.org, linux-phy@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-clk@vger.kernel.org, dri-devel@lists.freedesktop.org Subject: [PATCH 4/7] clk: mediatek: mt8167: Correct HDMI-related clock definitions Date: Sat, 10 Oct 2026 13:54:04 +0200 Message-ID: <20261010115539.9237-5-l.scorcia@gmail.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20261010115539.9237-1-l.scorcia@gmail.com> References: <20261010115539.9237-1-l.scorcia@gmail.com> Precedence: bulk X-Mailing-List: linux-clk@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit On the mt8167 SoC, the tvdpll_ck clock is used to clock the DPI1 pixel signal that is hardwired to the HDMI interface. The clocks used by those two blocks must match and they have to be changed according to the mode clock appropriate for the display resolution. Fix a couple of issues with the current HDMI clock definitions: - The hdmi_ref divider references the same register and offset of its parent tvdpll. Make sure to flag it as a read only divider as its rate must be set by the DPI driver only. - Both hdmi_ref and tvdpll_ck derive their clock from the same tvdpll parent clock, but its rate must be set by the DPI driver only. Unset the CLK_SET_RATE_PARENT flag that is implicitly set by the FACTOR() macro. Signed-off-by: Luca Leonardo Scorcia --- drivers/clk/mediatek/clk-mt8167-apmixedsys.c | 2 +- drivers/clk/mediatek/clk-mt8167.c | 6 +++++- 2 files changed, 6 insertions(+), 2 deletions(-) diff --git a/drivers/clk/mediatek/clk-mt8167-apmixedsys.c b/drivers/clk/mediatek/clk-mt8167-apmixedsys.c index 3e8611991de7..a7d38c194759 100644 --- a/drivers/clk/mediatek/clk-mt8167-apmixedsys.c +++ b/drivers/clk/mediatek/clk-mt8167-apmixedsys.c @@ -87,7 +87,7 @@ static const struct mtk_pll_data plls[] = { static const struct mtk_clk_divider adj_divs[] = { DIV_ADJ_FLAG(CLK_APMIXED_HDMI_REF, "hdmi_ref", "tvdpll", - 0x1c4, 24, 3, CLK_DIVIDER_POWER_OF_TWO), + 0x1c4, 24, 3, CLK_DIVIDER_POWER_OF_TWO | CLK_DIVIDER_READ_ONLY), }; static int clk_mt8167_apmixed_probe(struct platform_device *pdev) diff --git a/drivers/clk/mediatek/clk-mt8167.c b/drivers/clk/mediatek/clk-mt8167.c index c64d918c37de..a14f0736cdcf 100644 --- a/drivers/clk/mediatek/clk-mt8167.c +++ b/drivers/clk/mediatek/clk-mt8167.c @@ -75,7 +75,11 @@ static const struct mtk_fixed_factor top_divs[] = { FACTOR(CLK_TOP_CLK26M, "clk26m_ck", "clk26m", 1, 1), FACTOR(CLK_TOP_CLK26M_D2, "clk26m_d2", "clk26m", 1, 2), FACTOR(CLK_TOP_MIPI_26M, "mipi_26m", "clk26m", 1, 1), - FACTOR(CLK_TOP_TVDPLL, "tvdpll_ck", "tvdpll", 1, 1), + /* + * The tvdpll_ck clock should not propagate rate changes to its parent + * clock so the dpi driver can have full control over PLL and divider. + */ + FACTOR_FLAGS(CLK_TOP_TVDPLL, "tvdpll_ck", "tvdpll", 1, 1, 0), FACTOR(CLK_TOP_TVDPLL_D2, "tvdpll_d2", "tvdpll_ck", 1, 2), FACTOR(CLK_TOP_TVDPLL_D4, "tvdpll_d4", "tvdpll_ck", 1, 4), FACTOR(CLK_TOP_TVDPLL_D8, "tvdpll_d8", "tvdpll_ck", 1, 8), -- 2.43.0 From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 4C3BBCA6004 for ; Sat, 10 Oct 2026 11:56:58 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-ID:Date:Subject:Cc:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=noorgTglwguBIjEh/gL70XdTE+XkC5++I8rBUl7ijXA=; b=DZg3mmXtbLUhl1 o1gD/juMuqsKCWZWZWls7fB5VghYibk2wQwOtXKQwk1E8N5W+HrJaG9zcDjbBToqDAppAdi7x2do6 FOoMZLDQpYYQ5KHLkb9Pu1Fdelg9h4sQ87XH3lI9sOMWAoLC9JrYLJ88gHiCHzI3N3JGnpNoRbRXS NowDgiM6lcAnOM1ZR/q+6xKXdqtzlytv3CVS+/uAdbeJHp8O6oUmOXznycVC2W6jsczHWAUOZRd4E Q8/nvv/cC9Tab7y0njHxFuS95AFEYZdO1KuKlEufZ9ueUZiMwA/+4hX0IFLAp54dYzKQS3eVGdcXe iNwo6yC+LC7FR3etqP6g==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.99.1 #2 (Red Hat Linux)) id 1xFVhB-00000007yZC-3Xzx; Sat, 10 Oct 2026 11:56:57 +0000 Received: from desiato.infradead.org ([2001:8b0:10b:1:d65d:64ff:fe57:4e05]) by bombadil.infradead.org with esmtps (Exim 4.99.1 #2 (Red Hat Linux)) id 1xFVgO-00000007xvh-3yO8 for linux-phy@bombadil.infradead.org; Sat, 10 Oct 2026 11:56:12 +0000 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=infradead.org; s=desiato.20200630; h=Content-Transfer-Encoding:MIME-Version :References:In-Reply-To:Message-ID:Date:Subject:Cc:To:From:Sender:Reply-To: Content-Type:Content-ID:Content-Description; bh=Qv9bAeFxVCYRZjcdo00nj7An4pwjaNEncFgD0tELhn8=; b=a/2OhwGlJQUYYG7B/W3xp07tNM jSg5WXyYW/ofqrIxb5ElGvetbLba3v4s+a7n7l7sql6wg4CmDv7qtf7E4deLNr8mr1qwp291D0n5T ZRU0a1lrxPGF2X5yaaPqSD0opHXKcMJgz73gnNQxQuxl2cD2atHGPPQij52edEsFgWiSnXhQQN+2n j1a/HuiI6Sz7kTQAYThP1yl13ThUh6yysG53nq5rQnNZo9AQ4pZpuShv5mi9f8mnyhZ04kXY24Vms yTGivOd/RhV4H5dO2yj61ts5F+qqntBs4CtasjYW2pDE8LbdoYPW3IXksA5tFI1qPac4BVDLRflOd r1xhApWw==; Received: from mail-wr1-x42b.google.com ([2a00:1450:4864:20::42b]) by desiato.infradead.org with esmtps (Exim 4.99.2 #2 (Red Hat Linux)) id 1xFVgM-0000000C4pD-1TXR for linux-phy@lists.infradead.org; Sat, 10 Oct 2026 11:56:07 +0000 Received: by mail-wr1-x42b.google.com with SMTP id ffacd0b85a97d-48b02b1b4cfso1722931f8f.0 for ; Sat, 10 Oct 2026 04:56:06 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20251104; t=1791633365; x=1792238165; darn=lists.infradead.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to:content-type; bh=Qv9bAeFxVCYRZjcdo00nj7An4pwjaNEncFgD0tELhn8=; b=XiWK5TcS/mZcI/gcJsHdFt3bVN6aLr1BBZ68cpATlZhwj5BI/yEgRfT4A1hHcwY3sz U/WL1ROwXrTAmgUyDPTpU2c/i+Z/ojTN2qxlML8YuyXHtgr1/8W2nevF7CA/43/RydCa ARySBmcKCR1haASdlHIurgp70DA4cKCX/N25GPSjvcZVFwZCX9fzbKWkL4vtnv2XFF1X rSpnVf2dK8CKCeg4iRBXnJXXWML2pQppU3yKaCGiWzfsoxXpzW6ZGPoOCdsqv8JxyjD9 RFGnVCD2a4QRt1taI+W2fCks2rvMwvYyk+8iopCA3VrlaY/uzwRjLmO+q/E6EEEZwN/D Q3Gw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20260707; t=1791633365; x=1792238165; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-gg:x-gm-message-state:from :to:cc:subject:date:message-id:reply-to:content-type; bh=Qv9bAeFxVCYRZjcdo00nj7An4pwjaNEncFgD0tELhn8=; b=mGNWpsH7Cc/5JhSIw/88mjPK7i0GxR3uZBoAyGcAOnIgnxM8ekAKZcj6wPPXzn+2Ps gBOkSH2qBxlzF7O6UNfRigJY/7BVEWlvyG7U1Gk1sLd4grQAXgrIBblsM2oe447NGt/N M811rgnlg3Rfi929wcFoE3V8vcu8eJDQVsSHep8TZanvQxdDXRwu9Rh1YmUfyK5L7dkG 7wD1Nrkon4YAln1Ulm4OS/BP6mcNSPuUHvIaWxEZwapCNNwd5dvrA8+owgxmEU0+VLuF 6vIUjlcqgLhIs0jx8tgvd/HuY2ykt5qAUIyaLkAKbpZ1Xq+UPgcKnCHxjSLd5AnfAUzO nzQQ== X-Forwarded-Encrypted: i=1; AKwUvBxV0S7ThQw8LzDDgmAlLGalzp3U0YjVrJqH87pIehqyH7Ft25z4izw1aBvRvTiHL9A8NFGTnQ8kRfY=@lists.infradead.org X-Gm-Message-State: AFq9FYI+aFvfWSD6odsCmjcvRQcuyM0KmLiC+bTd8jE5FqwN/pBAwYsQ HI2vdouUCVZVp715PEk12vGybqEZ9mSSfrWDXrjaInj4uK7+MfQGzGeN X-Gm-Gg: AYBFou2TYoUfL7uUdF7f7nQ6puJsgAf4iMoS7jwC/zlaAP9tYiEASJzc5u+oFE0h2V+ Z4Lqwt17smwucOzYIzr8zpSXToJGrh6unKYMK9KPBOFeXOG9ChIrrywNl7jNDEXav1B4/T/43/F dah54395L88UDWC7b2DzBxouS1QkgDbU1XG22b/3gcWMMV4I+9+pq1f5Bbetl4FMeA9rw4/R1U2 ANdSUkU/KEcSmWy9C1De/K0QXqHxP5IqaTkQAu3E4nuY6kGOP7S60hu+jV9r78ecIrE4l1EhGUe nQa6SVG++JI4NMJcTBCNEzU0sX5FflOBQq8mc+fjmQjUIuDjySN+js5lK+z8ovK2ipAo9hmZFUZ 7Bv0e+Jtq+6UATAA1YkAdrdjJKZx6Iap0dswz6Hj1i8OA2g6+O1zgd/+apfQUjvROe9/aqdmSyk zUtCfJz5EFPn8RlBGjcpy1pqVpBZoZbegHY/nyPuMD6IMwI7/ZoyOpSIH5bokPclITGw== X-Received: by 2002:adf:e00b:0:10b0:48a:fff3:f9c1 with SMTP id ffacd0b85a97d-48db9482030mr6898560f8f.20.1791633364955; Sat, 10 Oct 2026 04:56:04 -0700 (PDT) Received: from luca-vm.lan ([154.61.61.58]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-48db9aca657sm8746340f8f.43.2026.10.10.04.56.03 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 10 Oct 2026 04:56:04 -0700 (PDT) From: Luca Leonardo Scorcia To: linux-mediatek@lists.infradead.org Cc: Luca Leonardo Scorcia , Chunfeng Yun , Vinod Koul , Neil Armstrong , Manivannan Sadhasivam , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Matthias Brugger , AngeloGioacchino Del Regno , Stephen Boyd , Brian Masney , Jerome Brunet , Chun-Kuang Hu , Philipp Zabel , David Airlie , Simona Vetter , Nicolas Frattaroli , Chen-Yu Tsai , Fabien Parent , chunhui dai , CK Hu , linux-arm-kernel@lists.infradead.org, linux-phy@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-clk@vger.kernel.org, dri-devel@lists.freedesktop.org Subject: [PATCH 4/7] clk: mediatek: mt8167: Correct HDMI-related clock definitions Date: Sat, 10 Oct 2026 13:54:04 +0200 Message-ID: <20261010115539.9237-5-l.scorcia@gmail.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20261010115539.9237-1-l.scorcia@gmail.com> References: <20261010115539.9237-1-l.scorcia@gmail.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.9.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20261010_125606_476819_37654AB1 X-CRM114-Status: GOOD ( 17.95 ) X-BeenThere: linux-phy@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: Linux Phy Mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-phy" Errors-To: linux-phy-bounces+linux-phy=archiver.kernel.org@lists.infradead.org On the mt8167 SoC, the tvdpll_ck clock is used to clock the DPI1 pixel signal that is hardwired to the HDMI interface. The clocks used by those two blocks must match and they have to be changed according to the mode clock appropriate for the display resolution. Fix a couple of issues with the current HDMI clock definitions: - The hdmi_ref divider references the same register and offset of its parent tvdpll. Make sure to flag it as a read only divider as its rate must be set by the DPI driver only. - Both hdmi_ref and tvdpll_ck derive their clock from the same tvdpll parent clock, but its rate must be set by the DPI driver only. Unset the CLK_SET_RATE_PARENT flag that is implicitly set by the FACTOR() macro. Signed-off-by: Luca Leonardo Scorcia --- drivers/clk/mediatek/clk-mt8167-apmixedsys.c | 2 +- drivers/clk/mediatek/clk-mt8167.c | 6 +++++- 2 files changed, 6 insertions(+), 2 deletions(-) diff --git a/drivers/clk/mediatek/clk-mt8167-apmixedsys.c b/drivers/clk/mediatek/clk-mt8167-apmixedsys.c index 3e8611991de7..a7d38c194759 100644 --- a/drivers/clk/mediatek/clk-mt8167-apmixedsys.c +++ b/drivers/clk/mediatek/clk-mt8167-apmixedsys.c @@ -87,7 +87,7 @@ static const struct mtk_pll_data plls[] = { static const struct mtk_clk_divider adj_divs[] = { DIV_ADJ_FLAG(CLK_APMIXED_HDMI_REF, "hdmi_ref", "tvdpll", - 0x1c4, 24, 3, CLK_DIVIDER_POWER_OF_TWO), + 0x1c4, 24, 3, CLK_DIVIDER_POWER_OF_TWO | CLK_DIVIDER_READ_ONLY), }; static int clk_mt8167_apmixed_probe(struct platform_device *pdev) diff --git a/drivers/clk/mediatek/clk-mt8167.c b/drivers/clk/mediatek/clk-mt8167.c index c64d918c37de..a14f0736cdcf 100644 --- a/drivers/clk/mediatek/clk-mt8167.c +++ b/drivers/clk/mediatek/clk-mt8167.c @@ -75,7 +75,11 @@ static const struct mtk_fixed_factor top_divs[] = { FACTOR(CLK_TOP_CLK26M, "clk26m_ck", "clk26m", 1, 1), FACTOR(CLK_TOP_CLK26M_D2, "clk26m_d2", "clk26m", 1, 2), FACTOR(CLK_TOP_MIPI_26M, "mipi_26m", "clk26m", 1, 1), - FACTOR(CLK_TOP_TVDPLL, "tvdpll_ck", "tvdpll", 1, 1), + /* + * The tvdpll_ck clock should not propagate rate changes to its parent + * clock so the dpi driver can have full control over PLL and divider. + */ + FACTOR_FLAGS(CLK_TOP_TVDPLL, "tvdpll_ck", "tvdpll", 1, 1, 0), FACTOR(CLK_TOP_TVDPLL_D2, "tvdpll_d2", "tvdpll_ck", 1, 2), FACTOR(CLK_TOP_TVDPLL_D4, "tvdpll_d4", "tvdpll_ck", 1, 4), FACTOR(CLK_TOP_TVDPLL_D8, "tvdpll_d8", "tvdpll_ck", 1, 8), -- 2.43.0 -- linux-phy mailing list linux-phy@lists.infradead.org https://lists.infradead.org/mailman/listinfo/linux-phy