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From: Ivan Vecera <ivecera@redhat.com>
To: netdev@vger.kernel.org
Cc: Petr Oros <poros@redhat.com>, Min Li <min.li@microchip.com>,
	Vadim Fedorenko <vadim.fedorenko@linux.dev>,
	Arkadiusz Kubalewski <arkadiusz.kubalewski@intel.com>,
	Jiri Pirko <jiri@resnulli.us>, Jakub Kicinski <kuba@kernel.org>,
	Prathosh Satish <Prathosh.Satish@microchip.com>,
	Paolo Abeni <pabeni@redhat.com>,
	linux-kernel@vger.kernel.org
Subject: [PATCH net v5 1/5] dpll: zl3073x: do not offer 0 Hz as a supported pin frequency
Date: Sun, 11 Oct 2026 08:12:07 +0200	[thread overview]
Message-ID: <20261011061211.448373-2-ivecera@redhat.com> (raw)
In-Reply-To: <20261011061211.448373-1-ivecera@redhat.com>

zl3073x_pin_props_get() always adds the current pin frequency to the
supported list without checking it. A sub-Hz frequency reads back as
0 Hz, so 0 Hz can then be requested and the output frequency set
callback divides by zero. A 0 Hz entry in the firmware node is not
rejected either: it is offered for an input pin, and for an output pin
zl3073x_pin_check_freq() divides by it at probe time.

Do not add a 0 Hz current frequency and reject 0 Hz in
zl3073x_pin_check_freq(). If the list ends up empty, do not publish it
at all, as the DPLL core rejects an empty non-NULL list.

Found by code inspection, not triggered at runtime.

Fixes: 85a9aaac4a38 ("dpll: zl3073x: Include current frequency in supported frequencies list")
Reviewed-by: Petr Oros <poros@redhat.com>
Signed-off-by: Ivan Vecera <ivecera@redhat.com>
---
 drivers/dpll/zl3073x/prop.c | 23 +++++++++++++++++++----
 1 file changed, 19 insertions(+), 4 deletions(-)

diff --git a/drivers/dpll/zl3073x/prop.c b/drivers/dpll/zl3073x/prop.c
index ac9d41d0f978..768e5424de2d 100644
--- a/drivers/dpll/zl3073x/prop.c
+++ b/drivers/dpll/zl3073x/prop.c
@@ -30,7 +30,7 @@ static bool
 zl3073x_pin_check_freq(struct zl3073x_dev *zldev, enum dpll_pin_direction dir,
 		       u8 id, u64 freq)
 {
-	if (freq > U32_MAX)
+	if (!freq || freq > U32_MAX)
 		goto err_inv_freq;
 
 	if (dir == DPLL_PIN_DIRECTION_INPUT) {
@@ -295,13 +295,20 @@ struct zl3073x_pin_props *zl3073x_pin_props_get(struct zl3073x_dev *zldev,
 		goto err_alloc_ranges;
 	}
 
-	/* Start with current frequency at index 0 */
-	ranges[0] = (struct dpll_pin_frequency)DPLL_PIN_FREQUENCY(curr_freq);
+	/* Start with current frequency at index 0. A sub-Hz frequency is
+	 * read back as 0 Hz and cannot be set, so it is not offered.
+	 */
+	j = 0;
+	if (curr_freq) {
+		struct dpll_pin_frequency freq = DPLL_PIN_FREQUENCY(curr_freq);
+
+		ranges[j++] = freq;
+	}
 
 	/* Add frequencies from firmware node, skipping current frequency
 	 * and filtering out frequencies not representable by device
 	 */
-	for (i = 0, j = 1; i < num_freqs; i++) {
+	for (i = 0; i < num_freqs; i++) {
 		struct dpll_pin_frequency freq = DPLL_PIN_FREQUENCY(freqs[i]);
 
 		if (freqs[i] == curr_freq)
@@ -312,6 +319,14 @@ struct zl3073x_pin_props *zl3073x_pin_props_get(struct zl3073x_dev *zldev,
 		}
 	}
 
+	/* The DPLL core rejects a non-NULL list without entries, so do
+	 * not publish the array at all when nothing is settable.
+	 */
+	if (!j) {
+		kfree(ranges);
+		ranges = NULL;
+	}
+
 	/* Save number of freq ranges and pointer to them into pin properties */
 	props->dpll_props.freq_supported = ranges;
 	props->dpll_props.freq_supported_num = j;
-- 
2.56.0


  reply	other threads:[~2026-10-11  6:12 UTC|newest]

Thread overview: 16+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-10-11  6:12 [PATCH net v5 0/5] dpll: zl3073x: fix output pin frequency, esync and sibling notifications Ivan Vecera
2026-10-11  6:12 ` Ivan Vecera [this message]
2026-10-12  6:13   ` [PATCH net v5 1/5] dpll: zl3073x: do not offer 0 Hz as a supported pin frequency netdev-bot+sashiko
2026-10-12  7:14     ` Ivan Vecera
2026-10-17  1:02       ` Jakub Kicinski
2026-10-11  6:12 ` [PATCH net v5 2/5] dpll: zl3073x: reject inexact frequencies for N-divided outputs Ivan Vecera
2026-10-12  6:13   ` netdev-bot+sashiko
2026-10-12  7:16     ` Ivan Vecera
2026-10-11  6:12 ` [PATCH net v5 3/5] dpll: zl3073x: reject output frequencies with too small divisor Ivan Vecera
2026-10-12  6:13   ` netdev-bot+sashiko
2026-10-12  7:56     ` Ivan Vecera
2026-10-11  6:12 ` [PATCH net v5 4/5] dpll: zl3073x: make embedded sync follow the output carrier frequency Ivan Vecera
2026-10-11  6:12 ` [PATCH net v5 5/5] dpll: zl3073x: notify sibling pin when shared output config changes Ivan Vecera
2026-10-12  6:13   ` netdev-bot+sashiko
2026-10-12  7:59     ` Ivan Vecera
2026-10-17  1:10 ` [PATCH net v5 0/5] dpll: zl3073x: fix output pin frequency, esync and sibling notifications patchwork-bot+netdevbpf

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