From: Greg Ungerer <gerg@kernel.org>
To: linux-m68k@lists.linux-m68k.org
Cc: Greg Ungerer <gerg@linux-m68k.org>
Subject: [PATCH] m68knommu: coldfire: allow RAMBAR disable
Date: Mon, 12 Oct 2026 09:32:25 +1000 [thread overview]
Message-ID: <20261011233225.1300832-1-gerg@kernel.org> (raw)
From: Greg Ungerer <gerg@linux-m68k.org>
Most ColdFire SoC parts have a small SRAM hardware block. Linux does not
use this in any way currently. Unfortunately some boot ROMs enable and
map this SRAM block in their startup code - and leave it enabled when
passing control to loaded code - such as the linux kernel. Typically this
is not a problem and the SRAM block is mapped into the 32bit address
space at a harmless location. But this is not always the case.
Create a Kconfig option and supporting code that allows the kernel
startup to disable the SRAM block completely. In practice some ColdFire
boards have boot ROMs that are not easily upgraded or changed, so this
option will allow running mainline built kernels without hacking code
in on top.
The most commonly observed issue to date has been on MMU enabled
ColdFire parts where the SRAM block is mapped into the usual application
address space range. The SRAM block hardware has the highest priority
address decode and will supply its contents over that of virtually
mapped RAM.
Signed-off-by: Greg Ungerer <gerg@linux-m68k.org>
---
arch/m68k/Kconfig.cpu | 12 ++++++++++++
arch/m68k/coldfire/head.S | 5 +++++
2 files changed, 17 insertions(+)
diff --git a/arch/m68k/Kconfig.cpu b/arch/m68k/Kconfig.cpu
index 5a58cc13229e..37669c91933e 100644
--- a/arch/m68k/Kconfig.cpu
+++ b/arch/m68k/Kconfig.cpu
@@ -553,6 +553,18 @@ config NR_CPUS
int
default "1"
+config RAMBAR_DISABLE
+ bool "Disable the SRAM block at startup"
+ depends on COLDFIRE
+ help
+ Most ColdFire SoC parts have a small SRAM block that can be mapped
+ into the 32bit processor address space. Linux does not generally
+ use this. But some board boot ROMs enable it, and often map it at
+ odd address locations. It can cause boot up problems due to it being
+ enabled and clashing with DRAM, or more often with enabled and
+ mapped virtual memory space. Select this option for the kernel
+ to disable it during system startup.
+
# Coldfire cores that do not have a data cache configured can do coherent DMA.
config COLDFIRE_COHERENT_DMA
bool
diff --git a/arch/m68k/coldfire/head.S b/arch/m68k/coldfire/head.S
index c6d7fd28c602..2a53e087f57b 100644
--- a/arch/m68k/coldfire/head.S
+++ b/arch/m68k/coldfire/head.S
@@ -186,6 +186,11 @@ _start:
addl %a7,%d0
movel %d0,_ramend /* set end ram addr */
+#ifdef CONFIG_RAMBAR_DISABLE
+ movel #0,%d0 /* Disable SRAM region */
+ movec %d0,%RAMBAR
+#endif
+
/*
* Now that we know what the memory is, lets enable cache
* and get things moving. This is Coldfire CPU specific. Not
--
2.55.0
next reply other threads:[~2026-10-11 23:32 UTC|newest]
Thread overview: 3+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-10-11 23:32 Greg Ungerer [this message]
2026-10-12 9:00 ` [PATCH] m68knommu: coldfire: allow RAMBAR disable Jean-Michel Hautbois
2026-10-13 12:36 ` Greg Ungerer
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