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From: "Doru Blânzeanu" <dblanzeanu@linux.microsoft.com>
To: qemu-devel@nongnu.org
Cc: "Doru Blânzeanu" <dblanzeanu@microsoft.com>,
	"Wei Liu" <liuwe@microsoft.com>,
	"Magnus Kulke" <magnuskulke@linux.microsoft.com>,
	"Magnus Kulke" <magnuskulke@microsoft.com>,
	"Zhao Liu" <zhao1.liu@intel.com>,
	"Paolo Bonzini" <pbonzini@redhat.com>,
	"Wei Liu" <wei.liu@kernel.org>,
	"Doru Blânzeanu" <dblanzeanu@linux.microsoft.com>
Subject: [PATCH 0/2] Add CPU topology extension support for mshv guests
Date: Mon, 12 Oct 2026 18:44:40 +0300	[thread overview]
Message-ID: <20261012154442.306511-1-dblanzeanu@linux.microsoft.com> (raw)

This patch changes how MSHV constructs and registers the guest CPUID table.
It consists of two commits:

1. i386/cpu.c: Adjust minimum xlevel to 0x8000_001E when TOPOEXT is enabled
2. mshv/mshv-cpu.c: Collect all Intel topology subleaves and AMD cache subleaves

The first commit changes the extended CPUID level to 0x8000_001E when the TOPOEXT
feature is enabled.
This fix correctly reports CPU topology and cache leaves when TOPOEXT is
enabled.

Previous to the second commit, `collect_cpuid_entries` treated `0x0b` and `0x1f`
like ordinary leaves and collected only sub-leaf zero. But these Intel topology
leaves contain one sub-leaf per topology level.
With this patch, now it repeatedly calls `cpu_x86_cpuid` and stores every
result until ECX[15:8] becomes zero (same as kvm does).

Doru Blânzeanu (2):
  i386/cpu.c: Adjust minimum xlevel to 0x8000_001E when TOPOEXT is
    enabled
  mshv/mshv-cpu.c: Collect all Intel topology subleaves and AMD cache
    subleaves

 target/i386/cpu.c           |  5 +++++
 target/i386/mshv/mshv-cpu.c | 41 +++++++++++++++++++++++++++++--------
 2 files changed, 38 insertions(+), 8 deletions(-)

-- 
2.53.0



             reply	other threads:[~2026-10-12 15:45 UTC|newest]

Thread overview: 3+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-10-12 15:44 Doru Blânzeanu [this message]
2026-10-12 15:44 ` [PATCH 1/2] i386/cpu.c: Adjust minimum xlevel to 0x8000_001E when TOPOEXT is enabled Doru Blânzeanu
2026-10-12 15:44 ` [PATCH 2/2] mshv/mshv-cpu.c: Collect all Intel topology subleaves and AMD cache subleaves Doru Blânzeanu

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