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Tue, 13 Oct 2026 15:36:15 -0700 (PDT) Received: from twshared134145.14.frc2.facebook.com (2620:10d:c085:208::7cb7) by mail.thefacebook.com (2620:10d:c08b:78::c78f) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.2.2562.49; Tue, 13 Oct 2026 22:36:12 +0000 Received: by devbig197.nha3.facebook.com (Postfix, from userid 544533) id 659352D52CB78; Tue, 13 Oct 2026 15:35:53 -0700 (PDT) From: Keith Busch To: CC: , , , , , Keith Busch Subject: [RFC PATCH 1/3] genirq: Add disable_irq_nowait() Date: Tue, 13 Oct 2026 15:35:41 -0700 Message-ID: <20261013223543.395054-2-kbusch@meta.com> X-Mailer: git-send-email 2.52.0 In-Reply-To: <20261013223543.395054-1-kbusch@meta.com> References: <20261013223543.395054-1-kbusch@meta.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-FB-Internal: Safe Content-Type: text/plain X-Proofpoint-ORIG-GUID: 3mWFDc31IhRE6iHyX_oydYUjQGOxmvVl X-Authority-Analysis: v=2.4 cv=OvbaWC/t c=1 sm=1 tr=0 ts=6aceb25f cx=c_pps a=CB4LiSf2rd0gKozIdrpkBw==:117 a=CB4LiSf2rd0gKozIdrpkBw==:17 a=660iZSQnnn4A:10 a=VkNPw1HP01LnGYTKEx00:22 a=7x6HtfJdh03M6CCDgxCd:22 a=855S8uPTkML1Oy45N9_h:22 a=VwQbUJbxAAAA:8 a=6pG0410DK98tSDJBP48A:9 X-Proofpoint-Spam-Info: AW1haW4tMjYxMDEzMDA4OSBTYWx0ZWRfXzj2JK6Nojviq BK2zemgkmm1mnOx6tchAI8E01B0LYmEVsoXFEKdBoXht+aoJdQKGxGvbXZ5J6rH+9sjdRgk3BcP rQyYx2bqQ2GcNgpq7667hbhC+A6ktLA= X-Proofpoint-GUID: 3mWFDc31IhRE6iHyX_oydYUjQGOxmvVl X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYxMDEzMDA4OSBTYWx0ZWRfX3NSB4tqxKHMu n9oAcxzFZ8Lrqsg8E3pnm+WEpkP6sWq4VKtUJ/AjmhmiJIjg90PnKqmwHomR3D4P7EL3xoVEgpP SlpDtxC+3hhKktT1oXvhniW3SEYAeeHjAP+1s4FoZmpFEbdsgUTESA1F0iuYkdGVErll/Ly1WLN BNH+merxejZS9EXhH7PwmbnjFzBGYpZC7pWfDgXcmlAJx1nVB5p2bNc1Y3G3Zhi7vgCmv8R4P2x d6ksA8V/ug+KxPPz2zP6+rjiA/iEVHdfI4uyFLY9T58MqLGCwEfR+qrwL5ad0KUWzw2KHVv3/IH yhTYdE7JL4ha+y0V4g1dtnBHcfdwvHN3GCKoAAD3YMqURm69xDPR/UcQPq0VnxKhAd7SjQNUAhV zSKeQEH9uDtDbCbYON4U7LhE2N1IFenk9Vh2IHz2mmwK2WJ7eJOONW70mRfUquYdpyHuD7Q9vPu ho4w+qccm9oriyvGWAw== X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1176,Hydra:6.1.134,FMLib:17.12.100.49 definitions=2026-10-13_01,2026-10-09_01,2025-10-01_01 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.9.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20261013_153617_147639_20805150 X-CRM114-Status: GOOD ( 19.09 ) X-BeenThere: linux-nvme@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "Linux-nvme" Errors-To: linux-nvme-bounces+linux-nvme=archiver.kernel.org@lists.infradead.org From: Keith Busch Drivers that switch between interrupt and polled completions don't need to wait for the mask to reach the device; the disabled state already keeps their handler from running and a late interrupt is replayed on enable. Add an optional irq_chip irq_mask_nowait() callback, falling back to irq_mask(), and disable_irq_nowait() to mask through it right away rather than lazily. Signed-off-by: Keith Busch --- include/linux/interrupt.h | 1 + include/linux/irq.h | 4 ++++ kernel/irq/chip.c | 31 +++++++++++++++++++++++++++++++ kernel/irq/internals.h | 1 + kernel/irq/manage.c | 21 +++++++++++++++++++++ 5 files changed, 58 insertions(+) diff --git a/include/linux/interrupt.h b/include/linux/interrupt.h index 3bf969ad8fe07..d40c992ddb8a1 100644 --- a/include/linux/interrupt.h +++ b/include/linux/interrupt.h @@ -231,6 +231,7 @@ extern void devm_free_irq(struct device *dev, unsigne= d int irq, void *dev_id); =20 bool irq_has_action(unsigned int irq); extern void disable_irq_nosync(unsigned int irq); +extern void disable_irq_nowait(unsigned int irq); extern bool disable_hardirq(unsigned int irq); extern void disable_irq(unsigned int irq); extern void disable_percpu_irq(unsigned int irq); diff --git a/include/linux/irq.h b/include/linux/irq.h index f485369b1b4f7..de095299f20ed 100644 --- a/include/linux/irq.h +++ b/include/linux/irq.h @@ -455,6 +455,9 @@ static inline irq_hw_number_t irqd_to_hwirq(struct ir= q_data *d) * @irq_disable: disable the interrupt * @irq_ack: start of a new interrupt * @irq_mask: mask an interrupt source + * @irq_mask_nowait: mask an interrupt source without waiting for the + * hardware to acknowledge it (optional, falls back to + * @irq_mask) * @irq_mask_ack: ack and mask an interrupt source * @irq_unmask: unmask an interrupt source * @irq_eoi: end of interrupt @@ -505,6 +508,7 @@ struct irq_chip { =20 void (*irq_ack)(struct irq_data *data); void (*irq_mask)(struct irq_data *data); + void (*irq_mask_nowait)(struct irq_data *data); void (*irq_mask_ack)(struct irq_data *data); void (*irq_unmask)(struct irq_data *data); void (*irq_eoi)(struct irq_data *data); diff --git a/kernel/irq/chip.c b/kernel/irq/chip.c index de754db414d1d..4e76f025b5f68 100644 --- a/kernel/irq/chip.c +++ b/kernel/irq/chip.c @@ -399,6 +399,37 @@ void irq_disable(struct irq_desc *desc) __irq_disable(desc, irq_settings_disable_unlazy(desc)); } =20 +static void mask_irq_nowait(struct irq_desc *desc) +{ + if (irqd_irq_masked(&desc->irq_data)) + return; + + if (desc->irq_data.chip->irq_mask_nowait) { + desc->irq_data.chip->irq_mask_nowait(&desc->irq_data); + irq_state_set_masked(desc); + } else { + mask_irq(desc); + } +} + +/** + * irq_disable_nowait - Mark interrupt disabled and mask it without wait= ing + * @desc: irq descriptor which should be disabled + * + * Like irq_disable() with lazy disable turned off, but the hardware may + * still deliver an interrupt after this returns. The flow handler deals + * with that the same way it does for a lazily disabled interrupt. + */ +void irq_disable_nowait(struct irq_desc *desc) +{ + if (desc->irq_data.chip->irq_disable) { + __irq_disable(desc, true); + return; + } + irq_state_set_disabled(desc); + mask_irq_nowait(desc); +} + void irq_percpu_enable(struct irq_desc *desc, unsigned int cpu) { if (desc->irq_data.chip->irq_enable) diff --git a/kernel/irq/internals.h b/kernel/irq/internals.h index 0ce21dd454047..3ba13932ba831 100644 --- a/kernel/irq/internals.h +++ b/kernel/irq/internals.h @@ -98,6 +98,7 @@ extern void irq_startup_managed(struct irq_desc *desc); extern void irq_shutdown(struct irq_desc *desc); extern void irq_shutdown_and_deactivate(struct irq_desc *desc); extern void irq_disable(struct irq_desc *desc); +extern void irq_disable_nowait(struct irq_desc *desc); extern void irq_percpu_enable(struct irq_desc *desc, unsigned int cpu); extern void irq_percpu_disable(struct irq_desc *desc, unsigned int cpu); extern void mask_irq(struct irq_desc *desc); diff --git a/kernel/irq/manage.c b/kernel/irq/manage.c index 57eff26fa646a..7a4d7f1024133 100644 --- a/kernel/irq/manage.c +++ b/kernel/irq/manage.c @@ -705,6 +705,27 @@ void disable_irq_nosync(unsigned int irq) } EXPORT_SYMBOL(disable_irq_nosync); =20 +/** + * disable_irq_nowait - mask an irq without waiting for the hardware + * @irq: Interrupt to disable + * + * Like disable_irq_nosync(), but masks the interrupt at the chip right = away + * instead of lazily, and does not wait for the hardware to acknowledge = the + * mask. An interrupt that still arrives is held pending and replayed by + * enable_irq(). Use this when an extra interrupt is cheaper than flushi= ng + * the mask, e.g. switching from interrupts to polling. + * + * This function may be called from IRQ context. + */ +void disable_irq_nowait(unsigned int irq) +{ + scoped_irqdesc_get_and_buslock(irq, IRQ_GET_DESC_CHECK_GLOBAL) { + if (!scoped_irqdesc->depth++) + irq_disable_nowait(scoped_irqdesc); + } +} +EXPORT_SYMBOL_GPL(disable_irq_nowait); + /** * disable_irq - disable an irq and wait for completion * @irq: Interrupt to disable --=20 2.52.0