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envelope-from=bin.meng@processmission.com; helo=TYDPR03CU002.outbound.protection.outlook.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org FU540 SoC has a 2MiB L2 cache, so the maximum mapped size of L2LIM should be set to 2MiB too. Signed-off-by: Bin Meng Tested-by: Conor Dooley --- (no changes since v3) Changes in v3: - New hw/riscv/sifive_u.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/hw/riscv/sifive_u.c b/hw/riscv/sifive_u.c index b7d5e7b4da..1ac0d1bbd9 100644 --- a/hw/riscv/sifive_u.c +++ b/hw/riscv/sifive_u.c @@ -72,7 +72,7 @@ static const MemMapEntry sifive_u_memmap[] = { [SIFIVE_U_DEV_CLINT] = { 0x2000000, 0x10000 }, [SIFIVE_U_DEV_L2CC] = { 0x2010000, 0x1000 }, [SIFIVE_U_DEV_PDMA] = { 0x3000000, 0x100000 }, - [SIFIVE_U_DEV_L2LIM] = { 0x8000000, 0x2000000 }, + [SIFIVE_U_DEV_L2LIM] = { 0x8000000, 0x200000 }, [SIFIVE_U_DEV_PLIC] = { 0xc000000, 0x4000000 }, [SIFIVE_U_DEV_PRCI] = { 0x10000000, 0x1000 }, [SIFIVE_U_DEV_UART0] = { 0x10010000, 0x1000 }, -- 2.53.0