From: Sairaj Kodilkar <sarunkod@amd.com>
To: "Clément Mathieu--Drif" <clement.mathieu--drif@bull.com>,
"Michael S. Tsirkin" <mst@redhat.com>,
"Alejandro Jimenez" <alejandro.j.jimenez@oracle.com>,
"Ani Sinha" <anisinha@redhat.com>,
"Igor Mammedov" <imammedo@redhat.com>,
"Jason Wang" <jasowangio@gmail.com>,
"Marcelo Tosatti" <mtosatti@redhat.com>,
"Paolo Bonzini" <pbonzini@redhat.com>,
"Richard Henderson" <richard.henderson@linaro.org>,
"Sairaj Kodilkar" <sarunkod@amd.com>,
"Yi Liu" <yi.l.liu@intel.com>,
kvm@vger.kernel.org, qemu-devel@nongnu.org
Cc: <vasant.hegde@amd.com>, <suravee.suthikulpanit@amd.com>
Subject: [PATCH 5/8] i386/kvm: Use x86_iommu_device_get() for per-device IOMMU lookup
Date: Wed, 14 Oct 2026 11:04:30 +0530 [thread overview]
Message-ID: <20261014053433.24564-6-sarunkod@amd.com> (raw)
In-Reply-To: <20261014053433.24564-1-sarunkod@amd.com>
Currently, kvm_arch_fixup_msi_route() unconditionally uses the default
system IOMMU for interrupt remapping when IOMMU is present. This
approach fails when an IOMMU is attached to a non-system bus and serves
only a subset of devices, because the kernel does not program IRT
(Interrupt Remapping Table) entries for devices outside the IOMMU's
scope.
This patch changes the behavior to perform per-device IOMMU lookup:
- For PCI devices: Use pci_device_get_x86_iommu() to find the specific
IOMMU serving that device, if any
- For non-PCI devices (IOAPIC): Fall back to the default IOMMU
only if interrupt remapping is enabled (ioapic_as != address_space_memory)
This ensures MSI route translation occurs only for devices actually
managed by an IOMMU, enabling proper interrupt remapping in configurations
where IOMMUs are attached to arbitrary buses.
NOTE: This patch assumes that only non-PCI device calling is IOAPIC and
checks ioapic_as to determine interrupt remapping.
Signed-off-by: Sairaj Kodilkar <sarunkod@amd.com>
---
hw/intc/ioapic.c | 3 ++-
target/i386/kvm/kvm.c | 15 ++++++++++++---
2 files changed, 14 insertions(+), 4 deletions(-)
diff --git a/hw/intc/ioapic.c b/hw/intc/ioapic.c
index 1b3f1e824ac4..f1b881ee6118 100644
--- a/hw/intc/ioapic.c
+++ b/hw/intc/ioapic.c
@@ -438,8 +438,9 @@ static void ioapic_machine_done_notify(Notifier *notifier, void *data)
#ifdef ACCEL_GSI_IRQFD_POSSIBLE
IOAPICCommonState *s = container_of(notifier, IOAPICCommonState,
machine_done);
+ X86MachineState *x86ms = X86_MACHINE(qdev_get_machine());
- if (accel_irqchip_is_split()) {
+ if (accel_irqchip_is_split() && x86ms->ioapic_as != &address_space_memory) {
X86IOMMUState *iommu = x86_iommu_get_default();
if (iommu) {
/* Register this IOAPIC with IOMMU IEC notifier, so that
diff --git a/target/i386/kvm/kvm.c b/target/i386/kvm/kvm.c
index 644c45fb0a02..ffe977ceb418 100644
--- a/target/i386/kvm/kvm.c
+++ b/target/i386/kvm/kvm.c
@@ -6746,7 +6746,15 @@ uint64_t kvm_swizzle_msi_ext_dest_id(uint64_t address)
int kvm_arch_fixup_msi_route(struct kvm_irq_routing_entry *route,
uint64_t address, uint32_t data, PCIDevice *dev)
{
- X86IOMMUState *iommu = x86_iommu_get_default();
+ X86IOMMUState *iommu = NULL;
+ MachineState *ms = MACHINE(qdev_get_machine());
+ X86MachineState *x86ms = X86_MACHINE(ms);
+
+ if (dev) {
+ iommu = x86_iommu_device_get(dev);
+ } else if (x86ms->ioapic_as != &address_space_memory) {
+ iommu = x86_iommu_get_default();
+ }
if (iommu) {
X86IOMMUClass *class = X86_IOMMU_DEVICE_GET_CLASS(iommu);
@@ -6848,6 +6856,7 @@ int kvm_arch_add_msi_route_post(struct kvm_irq_routing_entry *route,
{
static bool notify_list_inited = false;
MSIRouteEntry *entry;
+ X86IOMMUState *iommu = NULL;
if (!dev) {
/* These are (possibly) IOAPIC routes only used for split
@@ -6867,13 +6876,13 @@ int kvm_arch_add_msi_route_post(struct kvm_irq_routing_entry *route,
if (!notify_list_inited) {
/* For the first time we do add route, add ourselves into
* IOMMU's IEC notify list if needed. */
- X86IOMMUState *iommu = x86_iommu_get_default();
+ iommu = x86_iommu_device_get(dev);
if (iommu) {
x86_iommu_iec_register_notifier(iommu,
kvm_update_msi_routes_all,
NULL);
+ notify_list_inited = true;
}
- notify_list_inited = true;
}
return 0;
}
--
2.34.1
next prev parent reply other threads:[~2026-10-14 5:36 UTC|newest]
Thread overview: 10+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-10-14 5:34 [PATCH 0/8] amd_iommu: Allow IOMMU to attach on non system bus Sairaj Kodilkar
2026-10-14 5:34 ` [PATCH 1/8] amd_iommu: Assign ioapic_as only when interrupt remapping is supported Sairaj Kodilkar
2026-10-14 5:34 ` [PATCH 2/8] x86-iommu: Introduce x86_iommu_device_get() for x86-iommu retrieval Sairaj Kodilkar
2026-10-14 5:34 ` [PATCH 3/8] amd_iommu: Add support for get_x86_iommu callback Sairaj Kodilkar
2026-10-14 5:34 ` [PATCH 4/8] intel_iommu: " Sairaj Kodilkar
2026-10-14 9:57 ` Clément MATHIEU--DRIF
2026-10-14 5:34 ` Sairaj Kodilkar [this message]
2026-10-14 5:34 ` [PATCH 6/8] amd_iommu: Introduce root bus Sairaj Kodilkar
2026-10-14 5:34 ` [PATCH 7/8] acpi-build: Create PCI topology using amd iommu " Sairaj Kodilkar
2026-10-14 5:34 ` [PATCH 8/8] amd_iommu: Allow IOMMU to attachment on non-system (pcie.0) bus Sairaj Kodilkar
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