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envelope-from=Sairaj.K@amd.com; helo=DM5PR21CU001.outbound.protection.outlook.com X-Spam_score_int: -22 X-Spam_score: -2.3 X-Spam_bar: -- X-Spam_report: (-2.3 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.24, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, RCVD_IN_MSPIKE_H2=0.001, SPF_HELO_PASS=-0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Following patch will create IVRS entries starting from the root bus Signed-off-by: Sairaj Kodilkar --- hw/i386/amd_iommu.c | 2 ++ hw/i386/amd_iommu.h | 3 +++ 2 files changed, 5 insertions(+) diff --git a/hw/i386/amd_iommu.c b/hw/i386/amd_iommu.c index 5c1fb0879c0f..5e4d5d1f1fcd 100644 --- a/hw/i386/amd_iommu.c +++ b/hw/i386/amd_iommu.c @@ -2713,6 +2713,8 @@ static void amdvi_sysbus_realize(DeviceState *dev, Error **errp) } } + s->root_bus = bus; + s->iotlb = g_hash_table_new_full(amdvi_iotlb_hash, amdvi_iotlb_equal, g_free, g_free); diff --git a/hw/i386/amd_iommu.h b/hw/i386/amd_iommu.h index 687691ec1cce..04a5bbd33740 100644 --- a/hw/i386/amd_iommu.h +++ b/hw/i386/amd_iommu.h @@ -373,6 +373,9 @@ struct AMDVIState { /* DMA address translation */ bool dma_remap; + + /* root bus to register IOMMU ops */ + PCIBus *root_bus; }; uint64_t amdvi_extended_feature_register(AMDVIState *s); -- 2.34.1