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From: Devendra K Verma <devverma@amd.com>
To: <mani@kernel.org>, <vkoul@kernel.org>, <frank.li@kernel.org>,
	<den@valinux.co.jp>
Cc: <dmaengine@vger.kernel.org>, <linux-pci@vger.kernel.org>,
	<linux-kernel@vger.kernel.org>, <michal.simek@amd.com>,
	<devverma@amd.com>
Subject: [PATCH v3 1/2] dmaengine: dw-edma: Sort Register Field Macros by Bit Position
Date: Wed, 14 Oct 2026 12:59:05 +0530	[thread overview]
Message-ID: <20261014072907.581539-2-devverma@amd.com> (raw)
In-Reply-To: <20261014072907.581539-1-devverma@amd.com>

Sort register field macros by bit position to improve readability.
No functional change.

Signed-off-by: Devendra K Verma <devverma@amd.com>
Reviewed-by: Frank Li <Frank.Li@nxp.com>
---
Changes in v2:
  o Rebased to dma/next branch as per reviewer's suggestion

Changes in v1:
  o Corrected heading and body as per reviewer's suggestion
---
 drivers/dma/dw-edma/dw-edma-pcie.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/dma/dw-edma/dw-edma-pcie.c b/drivers/dma/dw-edma/dw-edma-pcie.c
index fab4faf68b77..83f8353d89d0 100644
--- a/drivers/dma/dw-edma/dw-edma-pcie.c
+++ b/drivers/dma/dw-edma/dw-edma-pcie.c
@@ -31,8 +31,8 @@
 
 #define DW_PCIE_XILINX_MDB_VSEC_DMA_ID		0x6
 #define DW_PCIE_XILINX_MDB_VSEC_ID		0x20
-#define DW_PCIE_XILINX_MDB_VSEC_DMA_BAR		GENMASK(10, 8)
 #define DW_PCIE_XILINX_MDB_VSEC_DMA_MAP		GENMASK(2, 0)
+#define DW_PCIE_XILINX_MDB_VSEC_DMA_BAR		GENMASK(10, 8)
 /* AMD CPM6 (Xilinx) supported cap */
 #define DW_PCIE_XILINX_CPM6_VSEC_CH_SEP		GENMASK(18, 16)
 #define DW_PCIE_XILINX_MDB_VSEC_DMA_WR_CH	GENMASK(9, 0)
-- 
2.43.0


  reply	other threads:[~2026-10-14  7:29 UTC|newest]

Thread overview: 5+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-10-14  7:29 [PATCH v3 0/2] Macro Ordering and Typo Correction Devendra K Verma
2026-10-14  7:29 ` Devendra K Verma [this message]
2026-10-14  7:33   ` [PATCH v3 1/2] dmaengine: dw-edma: Sort Register Field Macros by Bit Position sashiko-bot
2026-10-14  7:29 ` [PATCH v3 2/2] dmaengine: dw-edma: correct IP name in xilinx_cpm6_dma_data comment Devendra K Verma
2026-10-14  7:30   ` sashiko-bot

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