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X-BeenThere: linux-riscv@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-riscv" Errors-To: linux-riscv-bounces+linux-riscv=archiver.kernel.org@lists.infradead.org Add eFUSE controller node for SG2044. Signed-off-by: Inochi Amaoto --- arch/riscv/boot/dts/sophgo/sg2044-sophgo-srd3-10.dts | 4 ++++ arch/riscv/boot/dts/sophgo/sg2044.dtsi | 12 ++++++++++++ drivers/nvmem/sophgo-efuse.c | 1 + 3 files changed, 17 insertions(+) diff --git a/arch/riscv/boot/dts/sophgo/sg2044-sophgo-srd3-10.dts b/arch/riscv/boot/dts/sophgo/sg2044-sophgo-srd3-10.dts index fed3d9a384a0..1b506972d465 100644 --- a/arch/riscv/boot/dts/sophgo/sg2044-sophgo-srd3-10.dts +++ b/arch/riscv/boot/dts/sophgo/sg2044-sophgo-srd3-10.dts @@ -36,6 +36,10 @@ &emmc { status = "okay"; }; +&efuse0 { + status = "okay"; +}; + &gmac0 { phy-handle = <&phy0>; phy-mode = "rgmii-id"; diff --git a/arch/riscv/boot/dts/sophgo/sg2044.dtsi b/arch/riscv/boot/dts/sophgo/sg2044.dtsi index 320c4d1d08e6..9577aae08f7f 100644 --- a/arch/riscv/boot/dts/sophgo/sg2044.dtsi +++ b/arch/riscv/boot/dts/sophgo/sg2044.dtsi @@ -408,6 +408,18 @@ sd: mmc@703000b000 { status = "disabled"; }; + efuse0: efuse@7040000000 { + compatible = "sophgo,sg2044-efuse"; + reg = <0x70 0x40000000 0x0 0x1000>; + #address-cells = <1>; + #size-cells = <1>; + clocks = <&clk CLK_GATE_EFUSE>, + <&clk CLK_GATE_APB_EFUSE>; + clock-names = "core", "apb"; + resets = <&rst RST_EFUSE0>; + status = "disabled"; + }; + i2c0: i2c@7040005000 { compatible = "sophgo,sg2044-i2c", "snps,designware-i2c"; reg = <0x70 0x40005000 0x0 0x1000>; diff --git a/drivers/nvmem/sophgo-efuse.c b/drivers/nvmem/sophgo-efuse.c index 5f90adaf8e4f..568d17b88ff6 100644 --- a/drivers/nvmem/sophgo-efuse.c +++ b/drivers/nvmem/sophgo-efuse.c @@ -14,6 +14,7 @@ #include #include #include +#include #define SG2044_EFUSE_CONTENT_SIZE 0x400 -- 2.56.0 _______________________________________________ linux-riscv mailing list linux-riscv@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-riscv From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mail-pg1-f181.google.com (mail-pg1-f181.google.com [209.85.215.181]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 7166E4B95BA for ; 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Wed, 14 Oct 2026 00:46:07 -0700 (PDT) Received: from localhost ([2001:19f0:8000:3e6e:5400:6ff:fe38:3d01]) by smtp.gmail.com with ESMTPSA id 98e67ed59e1d1-3ac5f1fb257sm3293530a91.0.2026.10.14.00.46.05 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 14 Oct 2026 00:46:06 -0700 (PDT) From: Inochi Amaoto To: Srinivas Kandagatla , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Chen Wang , Inochi Amaoto , Paul Walmsley , Palmer Dabbelt , Albert Ou , Alexandre Ghiti Cc: devicetree@vger.kernel.org, sophgo@lists.linux.dev, linux-kernel@vger.kernel.org, linux-riscv@lists.infradead.org, Yixun Lan , Longbin Li Subject: [PATCH 3/3] riscv: dts: sophgo: sg2044: Add eFUSE device Date: Wed, 14 Oct 2026 15:45:15 +0800 Message-ID: <20261014074516.240247-4-inochiama@gmail.com> X-Mailer: git-send-email 2.56.0 In-Reply-To: <20261014074516.240247-1-inochiama@gmail.com> References: <20261014074516.240247-1-inochiama@gmail.com> Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Add eFUSE controller node for SG2044. Signed-off-by: Inochi Amaoto --- arch/riscv/boot/dts/sophgo/sg2044-sophgo-srd3-10.dts | 4 ++++ arch/riscv/boot/dts/sophgo/sg2044.dtsi | 12 ++++++++++++ drivers/nvmem/sophgo-efuse.c | 1 + 3 files changed, 17 insertions(+) diff --git a/arch/riscv/boot/dts/sophgo/sg2044-sophgo-srd3-10.dts b/arch/riscv/boot/dts/sophgo/sg2044-sophgo-srd3-10.dts index fed3d9a384a0..1b506972d465 100644 --- a/arch/riscv/boot/dts/sophgo/sg2044-sophgo-srd3-10.dts +++ b/arch/riscv/boot/dts/sophgo/sg2044-sophgo-srd3-10.dts @@ -36,6 +36,10 @@ &emmc { status = "okay"; }; +&efuse0 { + status = "okay"; +}; + &gmac0 { phy-handle = <&phy0>; phy-mode = "rgmii-id"; diff --git a/arch/riscv/boot/dts/sophgo/sg2044.dtsi b/arch/riscv/boot/dts/sophgo/sg2044.dtsi index 320c4d1d08e6..9577aae08f7f 100644 --- a/arch/riscv/boot/dts/sophgo/sg2044.dtsi +++ b/arch/riscv/boot/dts/sophgo/sg2044.dtsi @@ -408,6 +408,18 @@ sd: mmc@703000b000 { status = "disabled"; }; + efuse0: efuse@7040000000 { + compatible = "sophgo,sg2044-efuse"; + reg = <0x70 0x40000000 0x0 0x1000>; + #address-cells = <1>; + #size-cells = <1>; + clocks = <&clk CLK_GATE_EFUSE>, + <&clk CLK_GATE_APB_EFUSE>; + clock-names = "core", "apb"; + resets = <&rst RST_EFUSE0>; + status = "disabled"; + }; + i2c0: i2c@7040005000 { compatible = "sophgo,sg2044-i2c", "snps,designware-i2c"; reg = <0x70 0x40005000 0x0 0x1000>; diff --git a/drivers/nvmem/sophgo-efuse.c b/drivers/nvmem/sophgo-efuse.c index 5f90adaf8e4f..568d17b88ff6 100644 --- a/drivers/nvmem/sophgo-efuse.c +++ b/drivers/nvmem/sophgo-efuse.c @@ -14,6 +14,7 @@ #include #include #include +#include #define SG2044_EFUSE_CONTENT_SIZE 0x400 -- 2.56.0