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[46.205.244.1]) by smtp.gmail.com with ESMTPSA id a640c23a62f3a-c3ed9b33006sm161790066b.32.2026.10.15.11.19.09 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 15 Oct 2026 11:19:10 -0700 (PDT) From: Maciej Kucharek To: amd-gfx@lists.freedesktop.org, alexander.deucher@amd.com Cc: christian.koenig@amd.com, Maciej Kucharek , Andre Eikmeyer , Frederick Morlock , =?UTF-8?q?Francisco=20Beltr=C3=A1n=20Millal=C3=A9n?= , stable@vger.kernel.org Subject: [PATCH v3 3/3] drm/amdgpu: reset VI ASIC on Apple boards with VRAM at 0 Date: Thu, 15 Oct 2026 20:18:37 +0200 Message-ID: <20261015181837.41690-4-qchcio@gmail.com> X-Mailer: git-send-email 2.55.0 In-Reply-To: <20261015181837.41690-1-qchcio@gmail.com> References: <20261015181837.41690-1-qchcio@gmail.com> MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-Mailman-Approved-At: Fri, 16 Oct 2026 08:55:44 +0000 X-BeenThere: amd-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Discussion list for AMD gfx List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: amd-gfx-bounces@lists.freedesktop.org Sender: "amd-gfx" On MacBookPros with switchable graphics, the firmware puts VRAM at MC address 0 when the iGPU is enabled. A later post (S3 resume, GPU reset) moves VRAM back to the VBIOS default. gmc_v8_0 reads MC_VM_FB_LOCATION once at init and reprograms it only on SR-IOV. On bare metal, the driver then keeps using the old layout. vi_reset_quirks[] resets these boards at load by PCI ID: commit a5be7ad8f5f0 ("drm/amdgpu: reset VI ASIC on MacBookPro15,1") commit a22e5e4f2ebb ("drm/amdgpu: reset VI ASIC on MacBookPro14,3") Replace the table with the test that SI and CIK use: an Apple subsystem vendor and VRAM at 0. Other Polaris MacBookPros then also get the reset at load, for example the MacBookPro13,3 if its firmware leaves VRAM at 0. On the MacBookPro14,3, MC_VM_FB_LOCATION is 0x007f0000 at load, so the new test covers it. The MacBookPro15,1 entries fix a module reload after S3. With the reset at first load, later posts keep VRAM where the driver expects it. The reload failure on these boards is then expected to go away, but this is not tested. After the reset, FB_BASE is not 0, so the new test does not fire again on a module reload. Only compile-tested. Suggested-by: Alex Deucher Cc: Andre Eikmeyer Cc: Frederick Morlock Cc: Francisco Beltrán Millalén Cc: stable@vger.kernel.org Assisted-by: Claude:claude-opus-5-5 Signed-off-by: Maciej Kucharek --- drivers/gpu/drm/amd/amdgpu/vi.c | 29 +++++++++-------------------- 1 file changed, 9 insertions(+), 20 deletions(-) diff --git a/drivers/gpu/drm/amd/amdgpu/vi.c b/drivers/gpu/drm/amd/amdgpu/vi.c index a0435fd55..999aeb797 100644 --- a/drivers/gpu/drm/amd/amdgpu/vi.c +++ b/drivers/gpu/drm/amd/amdgpu/vi.c @@ -1387,30 +1387,19 @@ static uint64_t vi_get_pcie_replay_count(struct amdgpu_device *adev) return (nak_r + nak_g); } -struct vi_reset_quirk { - u16 device; - u16 subsystem_vendor; - u16 subsystem_device; - u8 revision; -}; - -static const struct vi_reset_quirk vi_reset_quirks[] = { - { 0x67ef, PCI_VENDOR_ID_APPLE, 0x0190, 0xe3 }, /* Radeon Pro 555X */ - { 0x67ef, PCI_VENDOR_ID_APPLE, 0x018f, 0xc2 }, /* Radeon Pro 560X */ - { 0x67ef, PCI_VENDOR_ID_APPLE, 0x017a, 0xc7 }, /* Radeon Pro 555 */ -}; - static bool vi_need_reset_on_init(struct amdgpu_device *adev) { - unsigned int i; u32 clock_cntl, pc; - for (i = 0; i < ARRAY_SIZE(vi_reset_quirks); i++) - if (adev->pdev->device == vi_reset_quirks[i].device && - adev->pdev->subsystem_vendor == vi_reset_quirks[i].subsystem_vendor && - adev->pdev->subsystem_device == vi_reset_quirks[i].subsystem_device && - adev->pdev->revision == vi_reset_quirks[i].revision) - return true; + /* + * MacBookPros with switchable graphics put VRAM at 0 when the iGPU + * is enabled. Any later post (S3 resume, GPU reset) moves it back to + * the vbios default, so reset and post on load to start with the + * vbios layout. + */ + if (adev->pdev->subsystem_vendor == PCI_VENDOR_ID_APPLE && + !(RREG32(mmMC_VM_FB_LOCATION) & MC_VM_FB_LOCATION__FB_BASE_MASK)) + return true; if (adev->flags & AMD_IS_APU) return false; -- 2.55.0