From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-alma10-1.taild15c8.ts.net [100.103.45.18]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id EA43A3B19B6; Sat, 17 Oct 2026 16:45:36 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=100.103.45.18 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1792255538; cv=none; b=mZjEaTzW/1wKXWEtBlfd+Oq6QPqYiemQP3fmHMwWWRVAAnUW+XtO6arqWk44WuH/NEqFIZruQuXKSwHQOKhIlRA288Y5rp58WftEd/2rCBKH2imu1UyYYVfVui3l1jCKTCRca6sTDFj/phhqWCmFyWRTConVNQO57bf6+iO8LuE= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1792255538; c=relaxed/simple; bh=IE9UL/1whd8i3R2+KeA80KxPLEYnNrQ96JHFPT/fOWs=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=MNEXfjlZeDNkMjrtt9Zw4Z3T0WbCnXagwapjiL95hH/jU2O4aV7HwkOAWRNvzIDwkn3PhgVG7BWbKN5XbYoa7VUWPxaG/YODaYti7Yr/k/GiBgstj8vQvuytgslGMxa3Wm/CJ2YHF6iGwFvCtp0JjUMGlr/VWnEFA0Tf6daSjrk= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=linuxfoundation.org header.i=@linuxfoundation.org header.b=jw625EXx; arc=none smtp.client-ip=100.103.45.18 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=linuxfoundation.org header.i=@linuxfoundation.org header.b="jw625EXx" Received: by smtp.kernel.org (Postfix) with ESMTPSA id 41BA91F000C4; Sat, 17 Oct 2026 16:45:36 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linuxfoundation.org; s=korg; t=1792255536; bh=QLs6L4hYDRYcrk/S8/mMCzMPWYg//8QqZ6c+JBeQh/w=; h=From:To:Cc:Subject:Date:In-Reply-To:References; b=jw625EXxb4V/FDZJqe/PQDuqMzVSKYLo7ttnQ8uQjZpHn/M+3USIhoDGTBZ1Jv2xc aBhxTTyU9NnMTigZW5A4vVf8eheWu/51jCU7e0jOizlRcQ1HBWbewMARUyG4iKNmrB s6ZcwM/PrMURyVkAbC/Qr7xhz+kfWWkfPHfShIak= From: Greg Kroah-Hartman To: stable@vger.kernel.org Cc: Greg Kroah-Hartman , patches@lists.linux.dev, Guoniu Zhou , Frank Li , Peng Fan , Ulf Hansson , Sasha Levin Subject: [PATCH 6.12 810/869] pmdomain: imx93-blk-ctrl: Extract PHY as shared domain for DSI/CSI Date: Sat, 17 Oct 2026 18:00:51 +0200 Message-ID: <20261017160057.663399686@linuxfoundation.org> X-Mailer: git-send-email 2.56.0 In-Reply-To: <20261017160036.979869304@linuxfoundation.org> References: <20261017160036.979869304@linuxfoundation.org> User-Agent: quilt/0.69 X-stable: review X-Patchwork-Hint: ignore Precedence: bulk X-Mailing-List: patches@lists.linux.dev List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit 6.12-stable review patch. If anyone has any objections, please let me know. ------------------ From: Guoniu Zhou [ Upstream commit 99611233f8cda833169fa6487d5dacdf189e5cb0 ] The MIPI DSI and CSI domains share control bits for clock and reset, which can lead to incorrect behavior if one domain disables the shared resource while the other is still active. To fix the issue, introduce a shared MIPI PHY power domain to own the common resources and make DSI and CSI its subdomains. This ensures the shared bits are properly managed and not disabled while still in use. Fixes: e9aa77d413c9 ("soc: imx: add i.MX93 media blk ctrl driver") Cc: stable@vger.kernel.org Signed-off-by: Guoniu Zhou Reviewed-by: Frank Li Reviewed-by: Peng Fan Signed-off-by: Ulf Hansson Signed-off-by: Sasha Levin --- drivers/pmdomain/imx/imx93-blk-ctrl.c | 60 +++++++++++++++++++++++++-- 1 file changed, 57 insertions(+), 3 deletions(-) diff --git a/drivers/pmdomain/imx/imx93-blk-ctrl.c b/drivers/pmdomain/imx/imx93-blk-ctrl.c index b10348ac10f06..89886bdeb6cd3 100644 --- a/drivers/pmdomain/imx/imx93-blk-ctrl.c +++ b/drivers/pmdomain/imx/imx93-blk-ctrl.c @@ -47,6 +47,8 @@ #define PRIO(X) (X) +#define BLK_CTRL_NO_PARENT UINT_MAX + struct imx93_blk_ctrl_domain; struct imx93_blk_ctrl { @@ -73,6 +75,7 @@ struct imx93_blk_ctrl_domain_data { int num_clks; u32 rst_mask; u32 clk_mask; + u32 parent; int num_qos; struct imx93_blk_ctrl_qos qos[DOMAIN_MAX_QOS]; }; @@ -287,18 +290,46 @@ static int imx93_blk_ctrl_probe(struct platform_device *pdev) bc->onecell_data.domains[i] = &domain->genpd; } + for (i = 0; i < bc_data->num_domains; i++) { + struct imx93_blk_ctrl_domain *domain = &bc->domains[i]; + const struct imx93_blk_ctrl_domain_data *data = domain->data; + + if (data->parent == BLK_CTRL_NO_PARENT) + continue; + + ret = pm_genpd_add_subdomain(&bc->domains[data->parent].genpd, + &domain->genpd); + if (ret) { + dev_err_probe(dev, ret, "failed to add subdomain %s\n", + domain->genpd.name); + goto cleanup_subdomains; + } + } + pm_runtime_enable(dev); ret = of_genpd_add_provider_onecell(dev->of_node, &bc->onecell_data); if (ret) { dev_err_probe(dev, ret, "failed to add power domain provider\n"); - goto cleanup_pds; + goto cleanup_subdomains; } dev_set_drvdata(dev, bc); return 0; +cleanup_subdomains: + for (i--; i >= 0; i--) { + const struct imx93_blk_ctrl_domain_data *data = bc->domains[i].data; + + if (data->parent == BLK_CTRL_NO_PARENT) + continue; + + pm_genpd_remove_subdomain(&bc->domains[data->parent].genpd, + &bc->domains[i].genpd); + } + i = bc_data->num_domains; + cleanup_pds: for (i--; i >= 0; i--) pm_genpd_remove(&bc->domains[i].genpd); @@ -315,6 +346,16 @@ static void imx93_blk_ctrl_remove(struct platform_device *pdev) pm_runtime_disable(&pdev->dev); + for (i = 0; i < bc->onecell_data.num_domains; i++) { + struct imx93_blk_ctrl_domain *domain = &bc->domains[i]; + + if (domain->data->parent == BLK_CTRL_NO_PARENT) + continue; + + pm_genpd_remove_subdomain(&bc->domains[domain->data->parent].genpd, + &domain->genpd); + } + for (i = 0; i < bc->onecell_data.num_domains; i++) { struct imx93_blk_ctrl_domain *domain = &bc->domains[i]; @@ -327,8 +368,9 @@ static const struct imx93_blk_ctrl_domain_data imx93_media_blk_ctl_domain_data[] .name = "mediablk-mipi-dsi", .clk_names = (const char *[]){ "dsi" }, .num_clks = 1, - .rst_mask = BIT(11) | BIT(12), - .clk_mask = BIT(11) | BIT(12), + .rst_mask = BIT(11), + .clk_mask = BIT(11), + .parent = IMX93_MEDIABLK_PD_MIPI_PHY, }, [IMX93_MEDIABLK_PD_MIPI_CSI] = { .name = "mediablk-mipi-csi", @@ -336,6 +378,7 @@ static const struct imx93_blk_ctrl_domain_data imx93_media_blk_ctl_domain_data[] .num_clks = 2, .rst_mask = BIT(9) | BIT(10), .clk_mask = BIT(9) | BIT(10), + .parent = IMX93_MEDIABLK_PD_MIPI_PHY, }, [IMX93_MEDIABLK_PD_PXP] = { .name = "mediablk-pxp", @@ -343,6 +386,7 @@ static const struct imx93_blk_ctrl_domain_data imx93_media_blk_ctl_domain_data[] .num_clks = 1, .rst_mask = BIT(7) | BIT(8), .clk_mask = BIT(7) | BIT(8), + .parent = BLK_CTRL_NO_PARENT, .num_qos = 2, .qos = { { @@ -364,6 +408,7 @@ static const struct imx93_blk_ctrl_domain_data imx93_media_blk_ctl_domain_data[] .num_clks = 2, .rst_mask = BIT(4) | BIT(5) | BIT(6), .clk_mask = BIT(4) | BIT(5) | BIT(6), + .parent = BLK_CTRL_NO_PARENT, .num_qos = 1, .qos = { { @@ -380,6 +425,7 @@ static const struct imx93_blk_ctrl_domain_data imx93_media_blk_ctl_domain_data[] .num_clks = 1, .rst_mask = BIT(2) | BIT(3), .clk_mask = BIT(2) | BIT(3), + .parent = BLK_CTRL_NO_PARENT, .num_qos = 4, .qos = { { @@ -405,6 +451,14 @@ static const struct imx93_blk_ctrl_domain_data imx93_media_blk_ctl_domain_data[] } } }, + [IMX93_MEDIABLK_PD_MIPI_PHY] = { + .name = "mediablk-mipi-phy", + .clk_names = NULL, + .num_clks = 0, + .rst_mask = BIT(12), + .clk_mask = BIT(12), + .parent = BLK_CTRL_NO_PARENT, + }, }; static const struct regmap_range imx93_media_blk_ctl_yes_ranges[] = { -- 2.53.0