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Ip=[165.204.84.17]; Helo=[satlexmb07.amd.com] X-MS-Exchange-CrossTenant-AuthSource: SJ5PEPF000001F7.namprd05.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: CH3PR12MB7595 X-BeenThere: amd-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Discussion list for AMD gfx List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "amd-gfx" X-Spam-Status: No, score=-19.1 required=3.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_CR_TRAILER,INCLUDES_PATCH,MAILING_LIST_MULTI,SPF_HELO_NONE, SPF_PASS,USER_AGENT_GIT autolearn=ham autolearn_force=no version=4.0.1 X-Spam-Checker-Version: SpamAssassin 4.0.1 (2024-03-26) on aws-us-west-2-korg-listserv-alma10-1 Packet type 4 is used for conditional memory write and can be used to allow a memory write from within the IB. This write is done through IB_WR_VMID, which previously was set to 0 if we do IB parsing. After programming the VMIDs correctly we can enable packet type 4 with no issues. Signed-off-by: Benjamin Cheng --- drivers/gpu/drm/amd/amdgpu/jpeg_v1_0.c | 12 ++++++++---- 1 file changed, 8 insertions(+), 4 deletions(-) diff --git a/drivers/gpu/drm/amd/amdgpu/jpeg_v1_0.c b/drivers/gpu/drm/amd/amdgpu/jpeg_v1_0.c index b5bb7f4d607c..81facb99d885 100644 --- a/drivers/gpu/drm/amd/amdgpu/jpeg_v1_0.c +++ b/drivers/gpu/drm/amd/amdgpu/jpeg_v1_0.c @@ -301,13 +301,14 @@ static void jpeg_v1_0_decode_ring_emit_ib(struct amdgpu_ring *ring, { struct amdgpu_device *adev = ring->adev; unsigned vmid = AMDGPU_JOB_GET_VMID(job); + uint32_t reg; + reg = vmid << UVD_LMI_JRBC_IB_VMID__IB_WR_VMID__SHIFT; + if (!ring->funcs->parse_cs) + reg |= (vmid << UVD_LMI_JRBC_IB_VMID__IB_RD_VMID__SHIFT); amdgpu_ring_write(ring, PACKETJ(SOC15_REG_OFFSET(JPEG, 0, mmUVD_LMI_JRBC_IB_VMID), 0, 0, PACKETJ_TYPE0)); - if (ring->funcs->parse_cs) - amdgpu_ring_write(ring, 0); - else - amdgpu_ring_write(ring, (vmid | (vmid << 4))); + amdgpu_ring_write(ring, reg); amdgpu_ring_write(ring, PACKETJ(SOC15_REG_OFFSET(JPEG, 0, mmUVD_LMI_JPEG_VMID), 0, 0, PACKETJ_TYPE0)); @@ -669,6 +670,9 @@ static int jpeg_v1_dec_ring_parse_cs(struct amdgpu_cs_parser *parser, if (reg != JPEG_V1_REG_SOFT_RESET) ret = -EINVAL; break; + case PACKETJ_TYPE4: + /* Allow any wait reg */ + break; case PACKETJ_TYPE6: if (ib->ptr[i] != CP_PACKETJ_NOP) ret = -EINVAL; -- 2.56.0