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Mon, 19 Oct 2026 15:29:00 -0700 (PDT) Received: from fabio-X870-EAGLE-WIFI7.tail2bb604.ts.net ([2804:1b3:a801:c1b3:7470:124f:adf9:af22]) by smtp.gmail.com with ESMTPSA id ada2fe7eead31-7cc7722e6fasm1303685137.7.2026.10.19.15.28.58 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 19 Oct 2026 15:28:59 -0700 (PDT) From: Fabio Estevam To: broonie@kernel.org Cc: shengjiu.wang@gmail.com, linux-sound@vger.kernel.org, Fabio Estevam Subject: [PATCH 2/3] ASoC: fsl_sai: Stop BCLK after the last stream is freed Date: Mon, 19 Oct 2026 19:28:26 -0300 Message-ID: <20261019222827.131120-2-festevam@gmail.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20261019222827.131120-1-festevam@gmail.com> References: <20261019222827.131120-1-festevam@gmail.com> X-Mailing-List: linux-sound@vger.kernel.org List-Id: List-Post: List-Help: List-Subscribe: List-Unsubscribe: List-Owner: Precedence: list MIME-Version: 1.0 Content-Transfer-Encoding: 8bit On i.MX8MP, trigger stop leaves BCE set so MCLK remains available to a codec. When the final stream is freed, hw_free disables MCLK, but TERE and BCE can keep BCLK running from the newly selected clock source, including an unconfigured bus clock. Clear TERE and BCE once no configured or active stream needs the clock. This preserves MCLK between trigger stop and hw_free. The premature clock output was reproduced on a custom i.MX8MP board. Fixes: 197c53c8ecb3 ("ASoC: fsl_sai: Don't disable bitclock for i.MX8MP") Signed-off-by: Fabio Estevam --- sound/soc/fsl/fsl_sai.c | 10 ++++++++++ 1 file changed, 10 insertions(+) diff --git a/sound/soc/fsl/fsl_sai.c b/sound/soc/fsl/fsl_sai.c index 51779d7f8bf8..a135b3da37cf 100644 --- a/sound/soc/fsl/fsl_sai.c +++ b/sound/soc/fsl/fsl_sai.c @@ -851,6 +851,16 @@ static int fsl_sai_hw_free(struct snd_pcm_substream *substream, } } + /* + * Keep MCLK available until the last stream is freed, as it may be + * needed by a codec. Once no stream uses it, stop TERE and BCE too; + * otherwise BCLK can continue from the clock source selected later. + */ + if (sai->soc_data->mclk_with_tere && sai->mclk_direction_output && + !sai->mclk_streams && snd_soc_dai_active(cpu_dai) <= 1) + regmap_update_bits(sai->regmap, FSL_SAI_TCSR(ofs), + FSL_SAI_CSR_TERE | FSL_SAI_CSR_BCE, 0); + return 0; } -- 2.43.0