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gZmxWTfsxUGJh3kF8Y3bpUiaeQ6SP0v6ovAdzaDBkkhQyClMlyB6ikZBlZT07pXykgRgT1YGfUwJiRuidBUBRvzBTq5PfFqc/wvdMsHvSNQ= X-MS-Exchange-Transport-CrossTenantHeadersStamped: DSWPR11MB9581 X-OriginatorOrg: intel.com X-BeenThere: intel-xe@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel Xe graphics driver List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "Intel-xe" X-Spam-Status: No, score=-19.1 required=3.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_CR_TRAILER,INCLUDES_PATCH,MAILING_LIST_MULTI,SPF_HELO_NONE, SPF_PASS,USER_AGENT_GIT autolearn=ham autolearn_force=no version=4.0.1 X-Spam-Checker-Version: SpamAssassin 4.0.1 (2024-03-26) on aws-us-west-2-korg-listserv-alma10-1 From: Piotr Piórkowski A VRAM region may need to be split into hard partitions, e.g. to keep kernel allocations in a dedicated low range of VRAM. Expressing such a split purely as a placement range would turn every VRAM allocation into a %GPU_BUDDY_RANGE_ALLOCATION, which constrains the buddy algorithm for what is really a hard, statically known split. Describe the types needed to manage each partition with a buddy allocator of its own instead. struct xe_ttm_vram_mgr_part ties a buddy allocator to the VRAM pool it backs, the manager holds up to XE_TTM_VRAM_MGR_MAX_PARTS of them, and resources and offlined pages record the partition their blocks were allocated from, as buddy offsets become partition relative. Each partition also tracks the CPU visible memory allocated from it, so that usage can be reported per pool purpose, and the alignment a partition base must honour is defined next to the partition itself. Suggested-by: Matthew Brost Assisted-by: Claude Opus 5.5 Signed-off-by: Piotr Piórkowski --- drivers/gpu/drm/xe/xe_ttm_vram_mgr_types.h | 46 ++++++++++++++++++++++ 1 file changed, 46 insertions(+) diff --git a/drivers/gpu/drm/xe/xe_ttm_vram_mgr_types.h b/drivers/gpu/drm/xe/xe_ttm_vram_mgr_types.h index 4a2cd27a5b617..1da3c82b28585 100644 --- a/drivers/gpu/drm/xe/xe_ttm_vram_mgr_types.h +++ b/drivers/gpu/drm/xe/xe_ttm_vram_mgr_types.h @@ -7,8 +7,46 @@ #define _XE_TTM_VRAM_MGR_TYPES_H_ #include +#include #include +struct xe_vram_pool; + +/** + * struct xe_ttm_vram_mgr_part - Partition of a VRAM region + * + * A VRAM region may be split into disjoint partitions, each managed by its + * own buddy allocator. An allocation belongs to exactly one partition and + * cannot span partition boundaries. This lets the manager allocate directly + * from the requested partition without resorting to + * %GPU_BUDDY_RANGE_ALLOCATION, which constrains the buddy allocation + * algorithm. + */ +struct xe_ttm_vram_mgr_part { + /** + * @pool: VRAM pool backed by this partition + * + * Once the manager is initialized, pool->part points back here. + */ + struct xe_vram_pool *pool; + /** @mm: DRM buddy allocator which manages this partition */ + struct gpu_buddy mm; + /** @used_visible: CPU visible bytes allocated from this partition */ + u64 used_visible; +}; + +/** XE_TTM_VRAM_MGR_MAX_PARTS - Max partitions of a single VRAM region */ +#define XE_TTM_VRAM_MGR_MAX_PARTS 2 + +/** + * XE_TTM_VRAM_MGR_PART_ALIGN - Required alignment of a partition base + * + * Buddy offsets are partition relative, so a partition base has to be + * aligned to the largest VRAM page size in regular use, otherwise an aligned + * buddy allocation is not aligned in the region. + */ +#define XE_TTM_VRAM_MGR_PART_ALIGN SZ_2M + /** * struct xe_ttm_vram_mgr - Xe TTM VRAM manager * @@ -19,6 +57,10 @@ struct xe_ttm_vram_mgr { struct ttm_resource_manager manager; /** @mm: DRM buddy allocator which manages the VRAM */ struct gpu_buddy mm; + /** @parts: Partitions this VRAM region is split into */ + struct xe_ttm_vram_mgr_part parts[XE_TTM_VRAM_MGR_MAX_PARTS]; + /** @num_parts: Number of initialized entries in @parts */ + unsigned int num_parts; /** @offlined_pages: List of offlined pages */ struct list_head offlined_pages; /** @n_offlined_pages: Number of offlined pages */ @@ -47,6 +89,8 @@ struct xe_ttm_vram_mgr_resource { struct ttm_resource base; /** @blocks: list of DRM buddy blocks */ struct list_head blocks; + /** @part: Partition owning @blocks, set on successful allocation */ + struct xe_ttm_vram_mgr_part *part; /** @used_visible_size: How many CPU visible bytes this resource is using */ u64 used_visible_size; /** @flags: flags associated with the resource */ @@ -73,6 +117,8 @@ struct xe_ttm_vram_offline_resource { struct list_head queued_link; /** @blocks: Buddy blocks reserved for this page */ struct list_head blocks; + /** @part: Partition owning @blocks, set on successful reservation */ + struct xe_ttm_vram_mgr_part *part; /** @used_visible_size: CPU-visible bytes consumed */ u64 used_visible_size; /** @addr: Faulty DPA reported by HW */ -- 2.34.1