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[88.187.86.199]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-48e254ef1bfsm2580046f8f.6.2026.10.20.20.16.29 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Tue, 20 Oct 2026 20:16:30 -0700 (PDT) From: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: qemu-ppc@nongnu.org, qemu-riscv@nongnu.org, qemu-arm@nongnu.org, qemu-s390x@nongnu.org, Pierrick Bouvier Subject: [PATCH v2 18/33] target/or1k: Register CPUClass::exception_name() handler Date: Wed, 21 Oct 2026 05:13:51 +0200 Message-ID: <20261021031407.24862-19-philmd@oss.qualcomm.com> X-Mailer: git-send-email 2.55.0 In-Reply-To: <20261021031407.24862-1-philmd@oss.qualcomm.com> References: <20261021031407.24862-1-philmd@oss.qualcomm.com> X-Archived-By: MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYxMDIxMDAxMiBTYWx0ZWRfX2/eOs5G0j36/ WLwJDIX12w+56Q8J49m/oadRR4DGfcpUQysrokkFbuFPdhHeFTWCiUe8FpOpRFGVZuc314qnuvx /iTOlwCdQjLwyzcQ0gbygLzSq7b3bfywNTFOdRfTwc9Qcjq91gIRwi0dVijfDmXPL1nnL1t8mzZ L22dMpTai0nXIRzTdeXhg3Lyj0p7M7VPKJtzWkaFm/rr/V/6ss6IvokQ+8+zGrzeOt367UnI5VI eaB6DrDYzA6ULNISKL8xzXtehX/UvLRlshSPqqjeEL2CRfog91KyymQ8UKCng1joci6lAilAA0n vsbvpxgjesmhWcA8M71H1r6EIFtMsbDzXGtZJyXnqo6+VNSIIriI5mTnaIpTao0wNpeC2zwmt4H 7b30rUbus1GQIaTJPTpOJOzTQuoxpubBG4FpLju+LvkFuG3vMOqWPQUJjhwn6TvMI8jtfUnbsjo MyLT8Mf2MiJ4jm+AkxQ== X-Proofpoint-ORIG-GUID: 9m0118fefKQBb8MxN3Uy33Usp9wfvoGs X-Proofpoint-GUID: 9m0118fefKQBb8MxN3Uy33Usp9wfvoGs X-Proofpoint-Spam-Info: AW1haW4tMjYxMDIxMDAxMiBTYWx0ZWRfX2tlUhvOffirj k5OjM62BHygX4R6kGGFqgNs2Fco8kFLbHH+Iyxo95FFtzdz/w//mli6fCaSJcXR8z3VQk7aGWUb Gp6yH4StG9mO8agB8e5sOKGhFUj7p/k= X-Authority-Analysis: v=2.4 cv=HL5WhYtv c=1 sm=1 tr=0 ts=6ad82e90 cx=c_pps a=7E5Bxpl4vBhpaufnMqZlrw==:117 a=4s3hRJSeHn4rkQlkrse1kQ==:17 a=IkcTkHD0fZMA:10 a=660iZSQnnn4A:10 a=M51BFTxLslgA:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=u7WPNUs3qKkmUXheDGA7:22 a=_K5XuSEh1TEqbUxoQ0s3:22 a=EUspDBNiAAAA:8 a=slxP8ohElPSaHwuvTCoA:9 a=3ZKOabzyN94A:10 a=QEXdDO2ut3YA:10 a=pJ04lnu7RYOZP9TFuWaZ:22 X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1176,Hydra:6.1.134,FMLib:17.12.100.49 definitions=2026-10-21_01,2026-10-19_02,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 priorityscore=1501 lowpriorityscore=0 adultscore=0 impostorscore=0 clxscore=1015 phishscore=0 suspectscore=0 bulkscore=0 malwarescore=0 spamscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2610190000 definitions=main-2610210012 Received-SPF: pass client-ip=205.220.168.131; envelope-from=philmd@oss.qualcomm.com; helo=mx0a-0031df01.pphosted.com X-Spam_score_int: -2 X-Spam_score: -0.3 X-Spam_bar: / X-Spam_report: (-0.3 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_LOW=-0.7, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, SUSPICIOUS_RECIPS=2.51 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Archive: List-Post: List-Help: List-Subscribe: , Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org X-Spam-Status: No, score=-18.8 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_CR_TRAILER,INCLUDES_PATCH,MAILING_LIST_MULTI,SPF_HELO_PASS, SPF_PASS,USER_AGENT_GIT autolearn=ham autolearn_force=no version=4.0.1 X-Spam-Checker-Version: SpamAssassin 4.0.1 (2024-03-26) on aws-us-west-2-korg-listserv-alma10-1 Factor openrisc_excp_name() out of openrisc_cpu_do_interrupt() and register it as the CPUClass::exception_name() handler, so the common exception logging can resolve OpenRISC exception codes to names. Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Pierrick Bouvier --- target/or1k/cpu.h | 2 ++ target/or1k/cpu.c | 1 + target/or1k/exception.c | 21 +++++++++++++++++++++ target/or1k/interrupt.c | 19 +------------------ 4 files changed, 25 insertions(+), 18 deletions(-) diff --git a/target/or1k/cpu.h b/target/or1k/cpu.h index fc4387ce7ae..96ed1779fae 100644 --- a/target/or1k/cpu.h +++ b/target/or1k/cpu.h @@ -155,6 +155,8 @@ enum { EXCP_NR, }; +const char *openrisc_excp_name(int excp); + /* Supervisor register */ enum { SR_SM = (1 << 0), diff --git a/target/or1k/cpu.c b/target/or1k/cpu.c index 66c00c0930c..e15f6bb5e71 100644 --- a/target/or1k/cpu.c +++ b/target/or1k/cpu.c @@ -285,6 +285,7 @@ static void openrisc_cpu_class_init(ObjectClass *oc, const void *data) &occ->parent_phases); cc->class_by_name = openrisc_cpu_class_by_name; + cc->exception_name = openrisc_excp_name; cc->dump_state = openrisc_cpu_dump_state; cc->set_pc = openrisc_cpu_set_pc; cc->get_pc = openrisc_cpu_get_pc; diff --git a/target/or1k/exception.c b/target/or1k/exception.c index 785181ef2ed..ca5e8a3134b 100644 --- a/target/or1k/exception.c +++ b/target/or1k/exception.c @@ -22,6 +22,27 @@ #include "cpu.h" #include "exception.h" +const char *openrisc_excp_name(int excp) +{ + static const char * const excp_name[EXCP_NR] = { + [EXCP_RESET] = "RESET", + [EXCP_BUSERR] = "BUSERR (bus error)", + [EXCP_DPF] = "DFP (data protection fault)", + [EXCP_IPF] = "IPF (code protection fault)", + [EXCP_TICK] = "TICK (timer interrupt)", + [EXCP_ALIGN] = "ALIGN", + [EXCP_ILLEGAL] = "ILLEGAL", + [EXCP_INT] = "INT (device interrupt)", + [EXCP_DTLBMISS] = "DTLBMISS (data tlb miss)", + [EXCP_ITLBMISS] = "ITLBMISS (code tlb miss)", + [EXCP_RANGE] = "RANGE", + [EXCP_SYSCALL] = "SYSCALL", + [EXCP_FPE] = "FPE", + [EXCP_TRAP] = "TRAP", + }; + return ARRAY_ELEM_OR_NULL(excp_name, excp) ?: "unknown"; +} + G_NORETURN void or1k_raise_exception(OpenRISCCPU *cpu, uint32_t excp) { CPUState *cs = CPU(cpu); diff --git a/target/or1k/interrupt.c b/target/or1k/interrupt.c index 6e89157639a..399c98e3881 100644 --- a/target/or1k/interrupt.c +++ b/target/or1k/interrupt.c @@ -66,26 +66,9 @@ void openrisc_cpu_do_interrupt(CPUState *cs) } if (exception > 0 && exception < EXCP_NR) { - static const char * const int_name[EXCP_NR] = { - [EXCP_RESET] = "RESET", - [EXCP_BUSERR] = "BUSERR (bus error)", - [EXCP_DPF] = "DFP (data protection fault)", - [EXCP_IPF] = "IPF (code protection fault)", - [EXCP_TICK] = "TICK (timer interrupt)", - [EXCP_ALIGN] = "ALIGN", - [EXCP_ILLEGAL] = "ILLEGAL", - [EXCP_INT] = "INT (device interrupt)", - [EXCP_DTLBMISS] = "DTLBMISS (data tlb miss)", - [EXCP_ITLBMISS] = "ITLBMISS (code tlb miss)", - [EXCP_RANGE] = "RANGE", - [EXCP_SYSCALL] = "SYSCALL", - [EXCP_FPE] = "FPE", - [EXCP_TRAP] = "TRAP", - }; - qemu_log_mask(CPU_LOG_INT, "CPU: %d INT: %s\n", cs->cpu_index, - int_name[exception]); + openrisc_excp_name(exception)); hwaddr vect_pc = exception << 8; if (env->cpucfgr & CPUCFGR_EVBARP) { -- 2.55.0