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From: Maarten Lankhorst <dev@lankhorst.se>
To: intel-xe@lists.freedesktop.org
Cc: Maarten Lankhorst <dev@lankhorst.se>
Subject: [PATCH 2/2] drm/xe/display: Use xe_bo_addr_iter in remapped DPT pinning
Date: Wed, 21 Oct 2026 17:01:18 +0200	[thread overview]
Message-ID: <20261021150116.516131-4-dev@lankhorst.se> (raw)
In-Reply-To: <20261021150116.516131-3-dev@lankhorst.se>

Right now we're using xe_bo_addr() on each individual address, which gives
problems at larger resolution and sizes, since it's a O(N²).

By using xe_bo_addr_iter_first() + xe_bo_addr_iter_addr(), the time
complexity is reduced again to O(N).

To fix rotated pinning requires some thinking.

Signed-off-by: Maarten Lankhorst <dev@lankhorst.se>
Fixes: https://gitlab.freedesktop.org/drm/xe/kernel/-/work_items/9516
---
 drivers/gpu/drm/xe/display/xe_fb_pin.c | 24 ++++++++++++------------
 1 file changed, 12 insertions(+), 12 deletions(-)

diff --git a/drivers/gpu/drm/xe/display/xe_fb_pin.c b/drivers/gpu/drm/xe/display/xe_fb_pin.c
index e09116265ae95..e7e5c70c7b236 100644
--- a/drivers/gpu/drm/xe/display/xe_fb_pin.c
+++ b/drivers/gpu/drm/xe/display/xe_fb_pin.c
@@ -17,6 +17,7 @@
 #include "xe_ggtt.h"
 #include "xe_pat.h"
 #include "xe_pm.h"
+#include "xe_res_cursor.h"
 #include "xe_vram_types.h"
 
 static void
@@ -68,14 +69,14 @@ write_dpt_remapped_linear(struct xe_bo *bo, struct iosys_map *map,
 	const u64 pte = xe_ggtt_encode_pte_flags(ggtt, bo,
 						 xe_cache_pat_idx(xe, XE_CACHE_NONE));
 	unsigned int offset = plane->offset * XE_PAGE_SIZE;
-	unsigned int size = plane->size;
+	unsigned int size = plane->size * XE_PAGE_SIZE;
+	struct xe_res_cursor cur;
 
-	while (size--) {
-		u64 addr = xe_bo_addr(bo, offset, XE_PAGE_SIZE);
+	for (xe_bo_addr_iter_first(bo, &cur, offset, size); cur.remaining; xe_res_next(&cur, XE_PAGE_SIZE)) {
+		u64 addr = xe_bo_addr_iter_addr(&cur);
 
 		iosys_map_wr(map, dest, u64, addr | pte);
 		dest += sizeof(u64);
-		offset += XE_PAGE_SIZE;
 	}
 
 	return dest;
@@ -90,18 +91,17 @@ write_dpt_remapped_tiled(struct xe_bo *bo, struct iosys_map *map,
 	struct xe_ggtt *ggtt = xe_device_get_root_tile(xe)->mem.ggtt;
 	const u64 pte = xe_ggtt_encode_pte_flags(ggtt, bo,
 						 xe_cache_pat_idx(xe, XE_CACHE_NONE));
-	unsigned int offset, column, row;
+	u32 offset = plane->offset * XE_PAGE_SIZE;
+	struct xe_res_cursor cur;
 
-	for (row = 0; row < plane->height; row++) {
-		offset = (plane->offset + plane->src_stride * row) *
-			 XE_PAGE_SIZE;
-
-		for (column = 0; column < plane->width; column++) {
-			u64 addr = xe_bo_addr(bo, offset, XE_PAGE_SIZE);
+	xe_bo_addr_iter_first(bo, &cur, offset, plane->height * plane->src_stride * XE_PAGE_SIZE);
+	while (cur.remaining) {
+		for (u32 column = 0; column < plane->width; column++) {
+			u64 addr = xe_bo_addr_iter_addr(&cur);
 
 			iosys_map_wr(map, dest, u64, addr | pte);
 			dest += sizeof(u64);
-			offset += XE_PAGE_SIZE;
+			xe_res_next(&cur, XE_PAGE_SIZE);
 		}
 
 		dest = write_dpt_padding(map, dest,
-- 
2.55.0


  reply	other threads:[~2026-10-21 15:01 UTC|newest]

Thread overview: 9+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-10-21 15:01 [PATCH 1/2] drm/xe/bo: Add xe_bo_addr_iter Maarten Lankhorst
2026-10-21 15:01 ` Maarten Lankhorst [this message]
2026-10-21 15:20   ` [PATCH 2/2] drm/xe/display: Use xe_bo_addr_iter in remapped DPT pinning sashiko-bot
2026-10-21 15:06 ` ✗ CI.checkpatch: warning for series starting with [1/2] drm/xe/bo: Add xe_bo_addr_iter Patchwork
2026-10-21 15:08 ` ✓ CI.KUnit: success " Patchwork
2026-10-21 15:46 ` ✓ Xe.CI.BAT: " Patchwork
2026-10-21 18:11 ` ✗ Xe.CI.FULL: failure " Patchwork
2026-10-21 18:33 ` [PATCH 1/2] " Matthew Brost
  -- strict thread matches above, loose matches on Subject: below --
2026-06-12 14:11 [PATCH 0/2] drm/xe/display: Optimize remapped DPT pinning Maarten Lankhorst
2026-06-12 14:11 ` [PATCH 2/2] drm/xe/display: Use xe_bo_addr_iter in " Maarten Lankhorst

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