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DKIM-Signature: v=1; a=ed25519-sha256; s=202507e; d=mainlining.org; c=relaxed/relaxed; h=Message-ID:Date:Subject:To:From; t=1792598512; bh=4GczjhMt0ipkH2ViqPbMVrS eQbD/tFGBGtlDaHofEso=; b=PAAm7BupX762wpsz8LAlEON5ZrNkxcE2bXh2NRcIRfMM7csYRC KcCIkowyArKh1SpcEqDPa0R6CbOuLlIVz/BA==; From: Bradley Morgan To: Tom Rini , u-boot@lists.u-boot-project.org Cc: Bradley Morgan , =?UTF-8?q?Marek=20Beh=C3=BAn?= , Peng Fan Subject: [PATCH v3 15/26] powerpc: mpc85xx: Remove P1025 support Date: Wed, 21 Oct 2026 16:01:11 +0000 Message-ID: <20261021160145.10430-16-brads@mainlining.org> X-Mailer: git-send-email 2.47.3 In-Reply-To: <20261021160145.10430-1-brads@mainlining.org> References: <20261021160145.10430-1-brads@mainlining.org> X-Archived-By: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Mailman-Approved-At: Wed, 21 Oct 2026 16:16:07 +0000 X-BeenThere: u-boot@lists.u-boot-project.org X-Mailman-Version: 2.1.30 Precedence: list List-Id: U-Boot discussion List-Archive: List-Post: List-Help: List-Subscribe: , X-Spam-Status: No, score=-18.9 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_CR_TRAILER,INCLUDES_PATCH,MAILING_LIST_MULTI,SPF_HELO_PASS, USER_AGENT_GIT autolearn=ham autolearn_force=no version=4.0.1 X-Spam-Checker-Version: SpamAssassin 4.0.1 (2024-03-26) on aws-us-west-2-korg-listserv-alma10-1 No board in the tree selects ARCH_P1025, and the variant is unmaintained. Remove its configuration and variant specific code while retaining the shared P1021 support. Signed-off-by: Bradley Morgan --- arch/Kconfig | 2 +- arch/powerpc/cpu/mpc85xx/Kconfig | 22 ---------------------- arch/powerpc/cpu/mpc85xx/Makefile | 1 - arch/powerpc/cpu/mpc85xx/speed.c | 2 +- arch/powerpc/cpu/mpc8xxx/cpu.c | 1 - arch/powerpc/include/asm/config_mpc85xx.h | 6 ------ arch/powerpc/include/asm/immap_85xx.h | 2 +- arch/powerpc/include/asm/processor.h | 1 - doc/README.mpc85xx-sd-spi-boot | 2 -- drivers/qe/Kconfig | 3 +-- 10 files changed, 4 insertions(+), 38 deletions(-) diff --git a/arch/Kconfig b/arch/Kconfig index 07214f2af7c..e806fa2e3e7 100644 --- a/arch/Kconfig +++ b/arch/Kconfig @@ -471,7 +471,7 @@ config SYS_IMMR default 0xE0000000 if MPC83xx && !ARCH_MPC8313 default 0x01000000 if ARCH_LS1021A || FSL_LSCH2 || FSL_LSCH3 default 0xFFE00000 if ARCH_P1010 || ARCH_P1020 || \ - ARCH_P1021 || ARCH_P1024 || ARCH_P1025 || \ + ARCH_P1021 || ARCH_P1024 || \ ARCH_P2020 default SYS_CCSRBAR_DEFAULT help diff --git a/arch/powerpc/cpu/mpc85xx/Kconfig b/arch/powerpc/cpu/mpc85xx/Kconfig index f4e34adbaea..6ca0ccd65e7 100644 --- a/arch/powerpc/cpu/mpc85xx/Kconfig +++ b/arch/powerpc/cpu/mpc85xx/Kconfig @@ -466,24 +466,6 @@ config ARCH_P1024 imply CMD_REGINFO imply SATA_SIL -config ARCH_P1025 - bool - select FSL_LAW - select SYS_FSL_ERRATUM_A004508 - select SYS_FSL_ERRATUM_A005125 - select SYS_FSL_ERRATUM_ELBC_A001 - select SYS_FSL_ERRATUM_ESDHC111 - select FSL_PCIE_DISABLE_ASPM - select FSL_PCIE_RESET - select SYS_FSL_HAS_DDR3 - select SYS_FSL_HAS_SEC - select SYS_FSL_SEC_BE - select SYS_FSL_SEC_COMPAT_2 - select SYS_PPC_E500_USE_DEBUG_TLB - select FSL_ELBC - imply SATA - imply CMD_REGINFO - config ARCH_P2020 bool select BTB @@ -781,7 +763,6 @@ config MAX_CPUS ARCH_P1020 || \ ARCH_P1021 || \ ARCH_P1024 || \ - ARCH_P1025 || \ ARCH_P2020 || \ ARCH_T1024 default 1 @@ -804,7 +785,6 @@ config SYS_CCSRBAR_DEFAULT ARCH_P1020 || \ ARCH_P1021 || \ ARCH_P1024 || \ - ARCH_P1025 || \ ARCH_P2020 default 0xfe000000 if ARCH_B4420 || \ ARCH_B4860 || \ @@ -1012,7 +992,6 @@ config SYS_FSL_NUM_LAWS ARCH_P1020 || \ ARCH_P1021 || \ ARCH_P1024 || \ - ARCH_P1025 || \ ARCH_P2020 default 10 if ARCH_MPC8544 default 8 if ARCH_MPC8540 || \ @@ -1125,7 +1104,6 @@ config SYS_PPC_E500_DEBUG_TLB default 2 if ARCH_P1020 || \ ARCH_P1021 || \ ARCH_P1024 || \ - ARCH_P1025 || \ ARCH_P2020 default 3 if ARCH_P1010 || \ ARCH_BSC9132 diff --git a/arch/powerpc/cpu/mpc85xx/Makefile b/arch/powerpc/cpu/mpc85xx/Makefile index c40558880ea..3746d5c6fdb 100644 --- a/arch/powerpc/cpu/mpc85xx/Makefile +++ b/arch/powerpc/cpu/mpc85xx/Makefile @@ -57,7 +57,6 @@ obj-$(CONFIG_ARCH_P1010) += p1010_serdes.o obj-$(CONFIG_ARCH_P1020) += p1021_serdes.o obj-$(CONFIG_ARCH_P1021) += p1021_serdes.o obj-$(CONFIG_ARCH_P1024) += p1021_serdes.o -obj-$(CONFIG_ARCH_P1025) += p1021_serdes.o obj-$(CONFIG_ARCH_P2020) += p2020_serdes.o obj-$(CONFIG_ARCH_P2041) += p2041_serdes.o obj-$(CONFIG_ARCH_T4240) += t4240_serdes.o diff --git a/arch/powerpc/cpu/mpc85xx/speed.c b/arch/powerpc/cpu/mpc85xx/speed.c index d17a19026dd..01fe85ffd57 100644 --- a/arch/powerpc/cpu/mpc85xx/speed.c +++ b/arch/powerpc/cpu/mpc85xx/speed.c @@ -544,7 +544,7 @@ void get_sys_info(sys_info_t *sys_info) #endif #ifdef CONFIG_QE -#if defined(CONFIG_ARCH_P1021) || defined(CONFIG_ARCH_P1025) +#if defined(CONFIG_ARCH_P1021) sys_info->freq_qe = sys_info->freq_systembus; #else qe_ratio = ((gur->porpllsr) & MPC85xx_PORPLLSR_QE_RATIO) diff --git a/arch/powerpc/cpu/mpc8xxx/cpu.c b/arch/powerpc/cpu/mpc8xxx/cpu.c index 668bd139066..ec036cdac01 100644 --- a/arch/powerpc/cpu/mpc8xxx/cpu.c +++ b/arch/powerpc/cpu/mpc8xxx/cpu.c @@ -49,7 +49,6 @@ static struct cpu_type cpu_type_list[] = { CPU_TYPE_ENTRY(P1021, P1021, 2), CPU_TYPE_ENTRY(P1022, P1022, 2), CPU_TYPE_ENTRY(P1024, P1024, 2), - CPU_TYPE_ENTRY(P1025, P1025, 2), CPU_TYPE_ENTRY(P2010, P2010, 1), CPU_TYPE_ENTRY(P2020, P2020, 2), CPU_TYPE_ENTRY(P2040, P2040, 4), diff --git a/arch/powerpc/include/asm/config_mpc85xx.h b/arch/powerpc/include/asm/config_mpc85xx.h index 67804ada5ed..3cc952797a7 100644 --- a/arch/powerpc/include/asm/config_mpc85xx.h +++ b/arch/powerpc/include/asm/config_mpc85xx.h @@ -15,12 +15,6 @@ #define MAX_QE_RISC 1 #define QE_NUM_OF_SNUM 28 -/* P1025 is lower end variant of P1021 */ -#elif defined(CONFIG_ARCH_P1025) -#define QE_MURAM_SIZE 0x6000UL -#define MAX_QE_RISC 1 -#define QE_NUM_OF_SNUM 28 - #elif defined(CONFIG_ARCH_P2020) #define CFG_SYS_FSL_SRIO_MAX_PORTS 2 #define CFG_SYS_FSL_SRIO_OB_WIN_NUM 9 diff --git a/arch/powerpc/include/asm/immap_85xx.h b/arch/powerpc/include/asm/immap_85xx.h index 39ddfcfe308..9f5e9a7cfcd 100644 --- a/arch/powerpc/include/asm/immap_85xx.h +++ b/arch/powerpc/include/asm/immap_85xx.h @@ -2077,7 +2077,7 @@ typedef struct ccsr_gur { u32 svr; /* System version */ u8 res10[8]; u32 rstcr; /* Reset control */ -#if defined(CONFIG_ARCH_P1021) || defined(CONFIG_ARCH_P1025) +#if defined(CONFIG_ARCH_P1021) u8 res11a[12]; u32 iovselsr; u8 res11b[60]; diff --git a/arch/powerpc/include/asm/processor.h b/arch/powerpc/include/asm/processor.h index 2612f182a4c..748cf1a3f54 100644 --- a/arch/powerpc/include/asm/processor.h +++ b/arch/powerpc/include/asm/processor.h @@ -1041,7 +1041,6 @@ #define SVR_P1021 0x80E401 #define SVR_P1022 0x80E600 #define SVR_P1024 0x80E402 -#define SVR_P1025 0x80E403 #define SVR_P2010 0x80E300 #define SVR_P2020 0x80E200 #define SVR_P2040 0x821000 diff --git a/doc/README.mpc85xx-sd-spi-boot b/doc/README.mpc85xx-sd-spi-boot index 086c8f9e49b..7a5748f5df3 100644 --- a/doc/README.mpc85xx-sd-spi-boot +++ b/doc/README.mpc85xx-sd-spi-boot @@ -64,8 +64,6 @@ P1010RDB config_ddr3_1gb_p1010rdb_800M.dat P1021RDB config_ddr3_1gb_p1_p2_rdb_pc_800M.dat P1022DS config_ddr3_2gb_p1022ds.dat P1024RDB config_ddr3_1gb_p1_p2_rdb_pc_667M.dat -P1025RDB config_ddr3_1gb_p1_p2_rdb_pc_667M.dat -P1016RDB config_ddr3_1gb_p1_p2_rdb_pc_667M.dat P1020UTM config_ddr3_1gb_p1_p2_rdb_pc_800M.dat P1020MBG config_ddr3_1gb_p1_p2_rdb_pc_800M.dat MPC8536DS config_ddr2_512m_mpc8536ds_667M.dat diff --git a/drivers/qe/Kconfig b/drivers/qe/Kconfig index 22ed80bfc66..1d10422dd37 100644 --- a/drivers/qe/Kconfig +++ b/drivers/qe/Kconfig @@ -4,8 +4,7 @@ config QE bool "Enable support for QUICC Engine" depends on PPC - default y if ARCH_T1040 || ARCH_T1042 || ARCH_T1024 || ARCH_P1021 \ - || ARCH_P1025 + default y if ARCH_T1040 || ARCH_T1042 || ARCH_T1024 || ARCH_P1021 help Chose this option to add support for the QUICC Engine. -- 2.47.3