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[88.187.86.199]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-4a21223d254sm4843955e9.3.2026.10.22.14.52.29 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Thu, 22 Oct 2026 14:52:30 -0700 (PDT) From: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: Pierrick Bouvier , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= , Richard Henderson , Helge Deller Subject: [PATCH v3 10/33] target/hppa: Register CPUClass::exception_name() handler Date: Thu, 22 Oct 2026 23:50:50 +0200 Message-ID: <20261022215115.19680-11-philmd@oss.qualcomm.com> X-Mailer: git-send-email 2.55.0 In-Reply-To: <20261022215115.19680-1-philmd@oss.qualcomm.com> References: <20261022215115.19680-1-philmd@oss.qualcomm.com> X-Archived-By: MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-Proofpoint-Spam-Info: AW1haW4tMjYxMDIyMDA4NyBTYWx0ZWRfX8MQn75mCESSF sL+kMvV0+GNO0jZInDFlHBoTNeT10ha3kaPD+dJUyjVOaU3KCGlOWsCbEt5gThUf8+QMtaxL10i 4LeCIG8NmxV3B5MnqyQQLL/TlSS60ak= X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYxMDIyMDA4NyBTYWx0ZWRfX+Xy/N430/mnU iPosSYgWTFNkjR/YYLjwQ30YfcrW0xnVRC4iRG+wUcl/6Pv9QxTEI0a9lyG+b6SCXnKQFW1RFB3 Bm5LBzCL3H2JI/mZcR2LmxBBkV1UALNrrAwluYx57enROnwELhKoeSlsYzMS3pqeEF8odWhh4Ky VsehrV9jmRY0b/WfemN0c9P0zf1QAW8RYN0u4EVzrq2svigJMiEwD7rNc/5TeriGNkLZed8inCq 1uMvrAKDw+1PTacv0nmBrpXLAqXmmOXnJKeeIp/5QIfKywgW4VZGsea7qq5RjhoQdrTF7YynITZ GPDvR18j2adF0yAmn+w6OqPGyC6g739fvgaBtnfujJHa8SIASjk5bFCOJ1sWMy5QZzEBjpTN1+W 2IQX/IKXVa6vemuks61St0MUN4TmeKjS4MQxGA0Wi0AdWuLlGB2shHgN3BY89oA5XRpzqy/rXH8 QLFfSaCD/ZMZ9MFVWiQ== X-Proofpoint-ORIG-GUID: n-PX6X31Ep1r2snnC2dNTdTf6tdKvg9h X-Authority-Analysis: v=2.4 cv=Nt1E4MdJ c=1 sm=1 tr=0 ts=6ada85a0 cx=c_pps a=hnmNkyzTK/kJ09Xio7VxxA==:117 a=4s3hRJSeHn4rkQlkrse1kQ==:17 a=IkcTkHD0fZMA:10 a=660iZSQnnn4A:10 a=M51BFTxLslgA:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=u7WPNUs3qKkmUXheDGA7:22 a=yx91gb_oNiZeI1HMLzn7:22 a=EUspDBNiAAAA:8 a=sCbknPHGl6sa5x2yAD0A:9 a=3ZKOabzyN94A:10 a=QEXdDO2ut3YA:10 a=PEH46H7Ffwr30OY-TuGO:22 X-Proofpoint-GUID: n-PX6X31Ep1r2snnC2dNTdTf6tdKvg9h X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1176,Hydra:6.1.138,FMLib:17.12.100.49 definitions=2026-10-22_06,2026-10-21_02,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 spamscore=0 clxscore=1015 impostorscore=0 suspectscore=0 malwarescore=0 phishscore=0 priorityscore=1501 lowpriorityscore=0 bulkscore=0 adultscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2610190000 definitions=main-2610220087 Received-SPF: pass client-ip=205.220.180.131; envelope-from=philmd@oss.qualcomm.com; helo=mx0b-0031df01.pphosted.com X-Spam_score_int: -27 X-Spam_score: -2.8 X-Spam_bar: -- X-Spam_report: (-2.8 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_LOW=-0.7, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Archive: List-Post: List-Help: List-Subscribe: , Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org X-Spam-Status: No, score=-18.8 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_CR_TRAILER,INCLUDES_PATCH,MAILING_LIST_MULTI,SPF_HELO_PASS, SPF_PASS,USER_AGENT_GIT autolearn=ham autolearn_force=no version=4.0.1 X-Spam-Checker-Version: SpamAssassin 4.0.1 (2024-03-26) on aws-us-west-2-korg-listserv-alma10-1 Factor hppa_exception_name() out of hppa_cpu_do_interrupt() and register it as the CPUClass::exception_name() handler, so the common exception logging can resolve HPPA exception codes to names. With '-d int', hppa_cpu_do_interrupt() now logs "INT: cpu N excp I (NAME)", NAME being "unknown" for unlisted codes, instead of "INT: cpu N NAME" or "INT: cpu N unknown I". Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Pierrick Bouvier --- target/hppa/cpu.h | 2 ++ target/hppa/cpu.c | 42 +++++++++++++++++++++++++++++++++++ target/hppa/int_helper.c | 48 +++------------------------------------- 3 files changed, 47 insertions(+), 45 deletions(-) diff --git a/target/hppa/cpu.h b/target/hppa/cpu.h index f453444d7f9..3914b3285c5 100644 --- a/target/hppa/cpu.h +++ b/target/hppa/cpu.h @@ -98,6 +98,8 @@ /* Emulated hardware TOC button */ #define EXCP_TOC 32 /* TOC = Transfer of control (NMI) */ +const char *hppa_exception_name(int excp); + #define CPU_INTERRUPT_NMI CPU_INTERRUPT_TGT_EXT_3 /* TOC */ /* Taken from Linux kernel: arch/parisc/include/asm/psw.h */ diff --git a/target/hppa/cpu.c b/target/hppa/cpu.c index 07b49e51326..70ea5b0c8be 100644 --- a/target/hppa/cpu.c +++ b/target/hppa/cpu.c @@ -20,6 +20,7 @@ #include "qemu/osdep.h" #include "qapi/error.h" +#include "qemu/cutils.h" #include "qemu/qemu-print.h" #include "qemu/timer.h" #include "cpu.h" @@ -291,6 +292,46 @@ static void hppa_cpu_class_base_init(ObjectClass *oc, const void *data) g_assert(acc->def->phys_addr_bits <= 54); } +const char *hppa_exception_name(int excp) +{ + static const char * const excp_names[] = { + [EXCP_HPMC] = "high priority machine check", + [EXCP_POWER_FAIL] = "power fail interrupt", + [EXCP_RC] = "recovery counter trap", + [EXCP_EXT_INTERRUPT] = "external interrupt", + [EXCP_LPMC] = "low priority machine check", + [EXCP_ITLB_MISS] = "instruction tlb miss fault", + [EXCP_IMP] = "instruction memory protection trap", + [EXCP_ILL] = "illegal instruction trap", + [EXCP_BREAK] = "break instruction trap", + [EXCP_PRIV_OPR] = "privileged operation trap", + [EXCP_PRIV_REG] = "privileged register trap", + [EXCP_OVERFLOW] = "overflow trap", + [EXCP_COND] = "conditional trap", + [EXCP_ASSIST] = "assist exception trap", + [EXCP_DTLB_MISS] = "data tlb miss fault", + [EXCP_NA_ITLB_MISS] = "non-access instruction tlb miss", + [EXCP_NA_DTLB_MISS] = "non-access data tlb miss", + [EXCP_DMP] = "data memory protection trap", + [EXCP_DMB] = "data memory break trap", + [EXCP_TLB_DIRTY] = "tlb dirty bit trap", + [EXCP_PAGE_REF] = "page reference trap", + [EXCP_ASSIST_EMU] = "assist emulation trap", + [EXCP_HPT] = "high-privilege transfer trap", + [EXCP_LPT] = "low-privilege transfer trap", + [EXCP_TB] = "taken branch trap", + [EXCP_DMAR] = "data memory access rights trap", + [EXCP_DMPI] = "data memory protection id trap", + [EXCP_UNALIGN] = "unaligned data reference trap", + [EXCP_PER_INTERRUPT] = "performance monitor interrupt", + [EXCP_SYSCALL] = "syscall", + [EXCP_SYSCALL_LWS] = "syscall-lws", + [EXCP_TOC] = "TOC (transfer of control)", + }; + + return STR_ARRAY_ELEM_OR_NULL(excp_names, excp) ?: "unknown"; +} + static void hppa_cpu_class_init(ObjectClass *oc, const void *data) { DeviceClass *dc = DEVICE_CLASS(oc); @@ -305,6 +346,7 @@ static void hppa_cpu_class_init(ObjectClass *oc, const void *data) &acc->parent_phases); cc->class_by_name = hppa_cpu_class_by_name; + cc->exception_name = hppa_exception_name; cc->dump_state = hppa_cpu_dump_state; cc->set_pc = hppa_cpu_set_pc; cc->get_pc = hppa_cpu_get_pc; diff --git a/target/hppa/int_helper.c b/target/hppa/int_helper.c index 3e87b9a0011..598d1c6cefe 100644 --- a/target/hppa/int_helper.c +++ b/target/hppa/int_helper.c @@ -235,53 +235,11 @@ void hppa_cpu_do_interrupt(CPUState *cs) } if (qemu_loglevel_mask(CPU_LOG_INT)) { - static const char * const names[] = { - [EXCP_HPMC] = "high priority machine check", - [EXCP_POWER_FAIL] = "power fail interrupt", - [EXCP_RC] = "recovery counter trap", - [EXCP_EXT_INTERRUPT] = "external interrupt", - [EXCP_LPMC] = "low priority machine check", - [EXCP_ITLB_MISS] = "instruction tlb miss fault", - [EXCP_IMP] = "instruction memory protection trap", - [EXCP_ILL] = "illegal instruction trap", - [EXCP_BREAK] = "break instruction trap", - [EXCP_PRIV_OPR] = "privileged operation trap", - [EXCP_PRIV_REG] = "privileged register trap", - [EXCP_OVERFLOW] = "overflow trap", - [EXCP_COND] = "conditional trap", - [EXCP_ASSIST] = "assist exception trap", - [EXCP_DTLB_MISS] = "data tlb miss fault", - [EXCP_NA_ITLB_MISS] = "non-access instruction tlb miss", - [EXCP_NA_DTLB_MISS] = "non-access data tlb miss", - [EXCP_DMP] = "data memory protection trap", - [EXCP_DMB] = "data memory break trap", - [EXCP_TLB_DIRTY] = "tlb dirty bit trap", - [EXCP_PAGE_REF] = "page reference trap", - [EXCP_ASSIST_EMU] = "assist emulation trap", - [EXCP_HPT] = "high-privilege transfer trap", - [EXCP_LPT] = "low-privilege transfer trap", - [EXCP_TB] = "taken branch trap", - [EXCP_DMAR] = "data memory access rights trap", - [EXCP_DMPI] = "data memory protection id trap", - [EXCP_UNALIGN] = "unaligned data reference trap", - [EXCP_PER_INTERRUPT] = "performance monitor interrupt", - [EXCP_SYSCALL] = "syscall", - [EXCP_SYSCALL_LWS] = "syscall-lws", - [EXCP_TOC] = "TOC (transfer of control)", - }; - FILE *logfile = qemu_log_trylock(); if (logfile) { - const char *name = NULL; - - if (i >= 0 && i < ARRAY_SIZE(names)) { - name = names[i]; - } - if (name) { - fprintf(logfile, "INT: cpu %d %s\n", cs->cpu_index, name); - } else { - fprintf(logfile, "INT: cpu %d unknown %d\n", cs->cpu_index, i); - } + const char *name = hppa_exception_name(i); + fprintf(logfile, "INT: cpu %d excp %d (%s)\n", + cs->cpu_index, i, name); hppa_cpu_dump_state(cs, logfile, 0); qemu_log_unlock(logfile); } -- 2.55.0