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[88.187.86.199]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-48e37eded3fsm682214f8f.7.2026.10.22.14.51.53 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Thu, 22 Oct 2026 14:51:54 -0700 (PDT) From: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: Pierrick Bouvier , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= , Richard Henderson Subject: [PATCH v3 05/33] target/alpha: Register CPUClass::exception_name() handler Date: Thu, 22 Oct 2026 23:50:45 +0200 Message-ID: <20261022215115.19680-6-philmd@oss.qualcomm.com> X-Mailer: git-send-email 2.55.0 In-Reply-To: <20261022215115.19680-1-philmd@oss.qualcomm.com> References: <20261022215115.19680-1-philmd@oss.qualcomm.com> X-Archived-By: MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-Proofpoint-GUID: afLchSSGNdprEPhy5tXMUd33zuAyks_S X-Proofpoint-Spam-Info: AW1haW4tMjYxMDIyMDA4NyBTYWx0ZWRfXzRxyOdQuWed6 +Iu7E+TPfCeGXaLivJwH1AOMhp2BawNvmt4Ep+lPmFkLifGt1UmgK/qFWsnoGI5uuNn6kAfSxW2 rvUzq0TRwFhNGB3dllgImN3YryaRfO0= X-Authority-Analysis: v=2.4 cv=VNZIDNPX c=1 sm=1 tr=0 ts=6ada857c cx=c_pps a=hnmNkyzTK/kJ09Xio7VxxA==:117 a=4s3hRJSeHn4rkQlkrse1kQ==:17 a=IkcTkHD0fZMA:10 a=660iZSQnnn4A:10 a=M51BFTxLslgA:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=u7WPNUs3qKkmUXheDGA7:22 a=Um2Pa8k9VHT-vaBCBUpS:22 a=EUspDBNiAAAA:8 a=kVf6GzFcR4OVXmdlW0QA:9 a=3ZKOabzyN94A:10 a=QEXdDO2ut3YA:10 a=PEH46H7Ffwr30OY-TuGO:22 X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYxMDIyMDA4NyBTYWx0ZWRfX/RYjg2DRMxbc dlLQFIqVsMh3AB1tKS9hyGx7pjcbxLXxKt5ymXQYMZrfi6ryPkKq/R2YwuvInYd2ANNjWFOC4/j 8QAyXzk+YlTD1vtO8rADqnghq3dIdBu5Yun3oiQrndnWEocyP2r/F+OV4hC512dj588rknMkkot 2KX1zC4kKQ4w9LkjnUOAKmRi2lxpyr+NF7dDmMAsLiUv1rrIHfWMzqeZRpI19j8he3hN855So5l 5lQyuYGMleBq8l5MI2er2zMJKmOa3mZ/tScnBZ9Vp74bazB81izPkO1bITKLL+aPo9Ofk7QDPdK tV9xAxALt/bRlgq+iePo9Grn33dkyTwebaNwOSRku01N0dCDbW5+ofHnsoywR99ZaTxLbf3ilHE /K6EMIeZY06IkXbBsKzGebeJ59RxCyMER+iooZ+TAPng5MURqq5fOYm5T7qOHwjWP/89mh1kRVB BIGNYl7yj72OWuCrQQw== X-Proofpoint-ORIG-GUID: afLchSSGNdprEPhy5tXMUd33zuAyks_S X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1176,Hydra:6.1.138,FMLib:17.12.100.49 definitions=2026-10-22_06,2026-10-21_02,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 priorityscore=1501 suspectscore=0 bulkscore=0 adultscore=0 phishscore=0 impostorscore=0 spamscore=0 lowpriorityscore=0 malwarescore=0 clxscore=1015 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2610190000 definitions=main-2610220087 Received-SPF: pass client-ip=205.220.168.131; envelope-from=philmd@oss.qualcomm.com; helo=mx0a-0031df01.pphosted.com X-Spam_score_int: -27 X-Spam_score: -2.8 X-Spam_bar: -- X-Spam_report: (-2.8 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_LOW=-0.7, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Archive: List-Post: List-Help: List-Subscribe: , Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org X-Spam-Status: No, score=-18.8 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_CR_TRAILER,INCLUDES_PATCH,MAILING_LIST_MULTI,SPF_HELO_PASS, SPF_PASS,USER_AGENT_GIT autolearn=ham autolearn_force=no version=4.0.1 X-Spam-Checker-Version: SpamAssassin 4.0.1 (2024-03-26) on aws-us-west-2-korg-listserv-alma10-1 Factor alpha_exception_name() out of alpha_cpu_do_interrupt() and register it as the CPUClass::exception_name() handler, so the common exception logging can resolve Alpha exception codes to names. Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Pierrick Bouvier --- target/alpha/cpu.h | 1 + target/alpha/cpu.c | 1 + target/alpha/helper.c | 82 ++++++++++++++++++++++++------------------- 3 files changed, 48 insertions(+), 36 deletions(-) diff --git a/target/alpha/cpu.h b/target/alpha/cpu.h index 378bd96d941..8f780502476 100644 --- a/target/alpha/cpu.h +++ b/target/alpha/cpu.h @@ -284,6 +284,7 @@ void alpha_cpu_do_interrupt(CPUState *cpu); bool alpha_cpu_exec_interrupt(CPUState *cpu, int int_req); hwaddr alpha_cpu_get_phys_addr_debug(CPUState *cpu, vaddr addr); #endif /* !CONFIG_USER_ONLY */ +const char *alpha_exception_name(int exception); void alpha_cpu_dump_state(CPUState *cs, FILE *f, int flags); int alpha_cpu_gdb_read_register(CPUState *cpu, GByteArray *buf, int reg); int alpha_cpu_gdb_write_register(CPUState *cpu, uint8_t *buf, int reg); diff --git a/target/alpha/cpu.c b/target/alpha/cpu.c index 12e86021663..f9936315fa2 100644 --- a/target/alpha/cpu.c +++ b/target/alpha/cpu.c @@ -283,6 +283,7 @@ static void alpha_cpu_class_init(ObjectClass *oc, const void *data) &acc->parent_realize); cc->class_by_name = alpha_cpu_class_by_name; + cc->exception_name = alpha_exception_name; cc->dump_state = alpha_cpu_dump_state; cc->set_pc = alpha_cpu_set_pc; cc->get_pc = alpha_cpu_get_pc; diff --git a/target/alpha/helper.c b/target/alpha/helper.c index c3614ecafda..cedb0006892 100644 --- a/target/alpha/helper.c +++ b/target/alpha/helper.c @@ -35,6 +35,51 @@ #define CONVERT_BIT(X, SRC, DST) \ (SRC > DST ? (X) / (SRC / DST) & (DST) : ((X) & SRC) * (DST / SRC)) +const char *alpha_exception_name(int excp) +{ + const char *name; + + switch (excp) { + case EXCP_RESET: + name = "reset"; + break; + case EXCP_MCHK: + name = "mchk"; + break; + case EXCP_SMP_INTERRUPT: + name = "smp_interrupt"; + break; + case EXCP_CLK_INTERRUPT: + name = "clk_interrupt"; + break; + case EXCP_DEV_INTERRUPT: + name = "dev_interrupt"; + break; + case EXCP_MMFAULT: + name = "mmfault"; + break; + case EXCP_UNALIGN: + name = "unalign"; + break; + case EXCP_OPCDEC: + name = "opcdec"; + break; + case EXCP_ARITH: + name = "arith"; + break; + case EXCP_FEN: + name = "fen"; + break; + case EXCP_CALL_PAL: + name = "call_pal"; + break; + default: + name = ""; + break; + } + return name; +} + uint64_t cpu_alpha_load_fpcr(CPUAlphaState *env) { return (uint64_t)env->fpcr << 32; @@ -343,43 +388,8 @@ void alpha_cpu_do_interrupt(CPUState *cs) if (qemu_loglevel_mask(CPU_LOG_INT)) { static int count; - const char *name = ""; + const char *name = alpha_exception_name(i); - switch (i) { - case EXCP_RESET: - name = "reset"; - break; - case EXCP_MCHK: - name = "mchk"; - break; - case EXCP_SMP_INTERRUPT: - name = "smp_interrupt"; - break; - case EXCP_CLK_INTERRUPT: - name = "clk_interrupt"; - break; - case EXCP_DEV_INTERRUPT: - name = "dev_interrupt"; - break; - case EXCP_MMFAULT: - name = "mmfault"; - break; - case EXCP_UNALIGN: - name = "unalign"; - break; - case EXCP_OPCDEC: - name = "opcdec"; - break; - case EXCP_ARITH: - name = "arith"; - break; - case EXCP_FEN: - name = "fen"; - break; - case EXCP_CALL_PAL: - name = "call_pal"; - break; - } qemu_log("INT %6d: %s(%#x) cpu=%d pc=%016" PRIx64 " sp=%016" PRIx64 "\n", ++count, name, env->error_code, cs->cpu_index, -- 2.55.0