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Fri, 23 Oct 2026 06:59:35 -0700 (PDT) Received: from localhost.localdomain ([2606:6d00:159:2900:450e:e72b:156b:33d1]) by smtp.gmail.com with ESMTPSA id af79cd13be357-94047811552sm23741285a.18.2026.10.23.06.59.34 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Fri, 23 Oct 2026 06:59:35 -0700 (PDT) From: Marcelo Manzo To: qemu-devel@nongnu.org Cc: qemu-arm@nongnu.org, peter.maydell@linaro.org, philmd@oss.qualcomm.com, Sergey Kambalin , Sergey Kambalin , Marcelo Manzo , Jason Wang Subject: [PATCH v5 08/16] hw/net/bcm2838_genet: add GENET register structs, part 4/4 Date: Fri, 23 Oct 2026 09:59:16 -0400 Message-ID: <20261023135924.64990-10-marcelomanzo@gmail.com> X-Mailer: git-send-email 2.55.0 In-Reply-To: <20261023135924.64990-1-marcelomanzo@gmail.com> References: <20261023135924.64990-1-marcelomanzo@gmail.com> X-Archived-By: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Received-SPF: pass client-ip=2607:f8b0:4864:20::f2d; envelope-from=marcelomanzo@gmail.com; helo=mail-qv1-xf2d.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_FROM=0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Archive: List-Post: List-Help: List-Subscribe: , Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org X-Spam-Status: No, score=-15.8 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,FREEMAIL_FORGED_FROMDOMAIN,FREEMAIL_FROM, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_PASS,SPF_PASS,USER_AGENT_GIT autolearn=ham autolearn_force=no version=4.0.1 X-Spam-Checker-Version: SpamAssassin 4.0.1 (2024-03-26) on aws-us-west-2-korg-listserv-alma10-1 From: Sergey Kambalin Add the PHY "shadow" register structs (BCM54213PE PHY-specific clock control, RGMII mode, LED, and expansion-block registers accessed via the AUX_CTL/EXP_SHD indirection scheme) used by the MDIO emulation added in a later patch. Part of Sergey Kambalin's original Raspberry Pi 4B PCIe/GENET networking series (patchwork series 829638, posted to qemu-devel in 2024, never merged). Carried forward and completed by Marcelo Manzo. Signed-off-by: Sergey Kambalin Signed-off-by: Marcelo Manzo Reviewed-by: Peter Maydell --- include/hw/net/bcm2838_genet.h | 35 ++++++++++++++++++++++++++++++++++ 1 file changed, 35 insertions(+) diff --git a/include/hw/net/bcm2838_genet.h b/include/hw/net/bcm2838_genet.h index fedfbde066..2c3c62a9dd 100644 --- a/include/hw/net/bcm2838_genet.h +++ b/include/hw/net/bcm2838_genet.h @@ -25,6 +25,12 @@ OBJECT_DECLARE_SIMPLE_TYPE(BCM2838GenetState, BCM2838_GENET) #define BCM2838_GENET_HFB_FILTER_CNT 48 #define BCM2838_GENET_HFB_FILTER_SIZE 128 +#define BCM2838_GENET_PHY_AUX_CTL_MISC 0x7 +#define BCM2838_GENET_PHY_AUX_CTL_REGS_SIZE 8 + +#define BCM2838_GENET_PHY_EXP_SHD_BLOCKS_CNT 256 +#define BCM2838_GENET_PHY_EXP_SHD_REGS_CNT 256 + typedef struct { uint32_t rev_ctrl; uint32_t port_ctrl; @@ -273,6 +279,32 @@ typedef struct { uint16_t rdb_data; } BCM2838GenetPhyRegs; +typedef struct { + uint16_t reserved_0_2[3]; + uint16_t clk_ctl; + uint16_t scr2; + uint16_t scr3; + uint16_t reserved_6_9[4]; + uint16_t apd; + uint16_t rgmii_mode; + uint16_t reserved_12; + uint16_t leds1; + uint16_t reserved_14_18[5]; + uint16_t _100fx_ctrl; + uint16_t ssd; + uint16_t reserved_21_30[10]; + uint16_t mode; +} BCM2838GenetPhyShdRegs; + +typedef struct { + uint16_t regs[BCM2838_GENET_PHY_AUX_CTL_REGS_SIZE]; +} BCM2838GenetPhyAuxShdRegs; + +typedef struct { + uint16_t regs[BCM2838_GENET_PHY_EXP_SHD_BLOCKS_CNT] + [BCM2838_GENET_PHY_EXP_SHD_REGS_CNT]; +} BCM2838GenetPhyExpShdRegs; + struct BCM2838GenetState { /*< private >*/ SysBusDevice parent_obj; @@ -284,6 +316,9 @@ struct BCM2838GenetState { BCM2838GenetRegs regs; BCM2838GenetPhyRegs phy_regs; + BCM2838GenetPhyShdRegs phy_shd_regs; + BCM2838GenetPhyAuxShdRegs phy_aux_ctl_shd_regs; + BCM2838GenetPhyExpShdRegs phy_exp_shd_regs; qemu_irq irq_default; qemu_irq irq_prio; -- 2.55.0