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Mon, 26 Oct 2026 23:02:22 -0700 (PDT) Received: from center.jhjvjihww5qejoy14qwv1cc4td.frax.internal.cloudapp.net ([131.189.143.225]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-4a35a2d6f6fsm234543795e9.12.2026.10.26.23.02.21 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 26 Oct 2026 23:02:21 -0700 (PDT) From: Orgad Shaneh To: linusw@kernel.org, brgl@kernel.org Cc: linux-gpio@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH] gpio: octeon: allocate the GPIO base dynamically Date: Tue, 27 Oct 2026 06:02:21 +0000 Message-ID: <20261027060221.2687941-1-orgads@gmail.com> X-Mailer: git-send-email 2.47.3 X-Mailing-List: linux-gpio@vger.kernel.org List-Id: List-Post: List-Help: List-Subscribe: List-Unsubscribe: List-Owner: Precedence: list MIME-Version: 1.0 Content-Transfer-Encoding: 8bit The driver registers its chip with base 0, which gpiolib reports on every boot: gpio gpiochip0: Static allocation of GPIO base is deprecated, use dynamic allocation. Nothing needs the fixed numbers. The only in-tree consumers, the gpio-leds nodes of the D-Link DSR boards, reference the controller by phandle; the GPIO interrupts go through the octeon-irq domain; and no board code uses the legacy integer API. Let gpiolib pick the base. Only the chip's number in the deprecated sysfs interface changes. Assisted-by: LLM Signed-off-by: Orgad Shaneh --- Tested on a CN6335 board, in a 7.3-based tree: the warning is gone and the chip probes as before. drivers/gpio/gpio-octeon.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/gpio/gpio-octeon.c b/drivers/gpio/gpio-octeon.c index 777e20c608dc..5fa4825d1a96 100644 --- a/drivers/gpio/gpio-octeon.c +++ b/drivers/gpio/gpio-octeon.c @@ -102,7 +102,7 @@ static int octeon_gpio_probe(struct platform_device *pdev) chip->label = "octeon-gpio"; chip->parent = &pdev->dev; chip->owner = THIS_MODULE; - chip->base = 0; + chip->base = -1; chip->can_sleep = false; chip->ngpio = 20; chip->direction_input = octeon_gpio_dir_in; -- 2.53.0