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Tue, 27 Oct 2026 07:31:01 -0700 (PDT) Received: from localhost.localdomain ([2606:6d00:159:2900:9872:3600:589:5f3a]) by smtp.gmail.com with ESMTPSA id af79cd13be357-940f0a78c06sm986400885a.35.2026.10.27.07.31.00 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Tue, 27 Oct 2026 07:31:00 -0700 (PDT) From: Marcelo Manzo To: qemu-devel@nongnu.org Cc: qemu-arm@nongnu.org, peter.maydell@linaro.org, philmd@oss.qualcomm.com, Marcelo Manzo , Jason Wang Subject: [PATCH v6 14/17] hw/net/bcm2838_genet: add migration state Date: Tue, 27 Oct 2026 10:30:33 -0400 Message-ID: <20261027143036.44973-15-marcelomanzo@gmail.com> X-Mailer: git-send-email 2.55.0 In-Reply-To: <20261027143036.44973-1-marcelomanzo@gmail.com> References: <20261027143036.44973-1-marcelomanzo@gmail.com> X-Archived-By: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Received-SPF: pass client-ip=2607:f8b0:4864:20::72e; envelope-from=marcelomanzo@gmail.com; helo=mail-qk1-x72e.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_FROM=0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-arm@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Archive: List-Post: List-Help: List-Subscribe: , Sender: qemu-arm-bounces+qemu-arm=archiver.kernel.org@nongnu.org X-Spam-Status: No, score=-15.8 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,FREEMAIL_FORGED_FROMDOMAIN,FREEMAIL_FROM, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_PASS,SPF_PASS,USER_AGENT_GIT autolearn=ham autolearn_force=no version=4.0.1 X-Spam-Checker-Version: SpamAssassin 4.0.1 (2024-03-26) on aws-us-west-2-korg-listserv-alma10-1 The device had no VMStateDescription, so none of its register or PHY state was saved or migrated. The MAC register block and the PHY registers are structs that contain nothing but uint32_t (MAC) or uint16_t (PHY) fields. Overlay each with an array of the same element type, in an anonymous union, so that the rest of the code keeps its s->regs.foo style access, and migrate each block as an array of that type. Unlike describing them as byte buffers, this is correct when migrating between hosts of different endianness. The interrupt outputs are derived from the registers and need no handling after load: the device at the other end of each line migrates its own state. Signed-off-by: Marcelo Manzo --- hw/net/bcm2838_genet.c | 23 +++++++++++++++++++++++ include/hw/net/bcm2838_genet.h | 22 +++++++++++++++++++--- 2 files changed, 42 insertions(+), 3 deletions(-) diff --git a/hw/net/bcm2838_genet.c b/hw/net/bcm2838_genet.c index 840a1bc72b..53bba99b38 100644 --- a/hw/net/bcm2838_genet.c +++ b/hw/net/bcm2838_genet.c @@ -17,6 +17,7 @@ #include "system/dma.h" #include "hw/core/registerfields.h" #include "hw/core/resettable.h" +#include "migration/vmstate.h" #include "hw/net/bcm2838_genet.h" #include "trace.h" @@ -1135,6 +1136,27 @@ static const Property genet_properties[] = { DEFINE_NIC_PROPERTIES(BCM2838GenetState, nic_conf), }; +static const VMStateDescription vmstate_bcm2838_genet = { + .name = "bcm2838-genet", + .version_id = 1, + .minimum_version_id = 1, + .fields = (const VMStateField[]) { + VMSTATE_UINT32_ARRAY(regs_u32, BCM2838GenetState, + sizeof(BCM2838GenetRegs) / sizeof(uint32_t)), + VMSTATE_UINT16_ARRAY(phy_regs_u16, BCM2838GenetState, + sizeof(BCM2838GenetPhyRegs) / sizeof(uint16_t)), + VMSTATE_UINT16_ARRAY(phy_shd_regs_u16, BCM2838GenetState, + sizeof(BCM2838GenetPhyShdRegs) + / sizeof(uint16_t)), + VMSTATE_UINT16_ARRAY(phy_aux_ctl_shd_regs.regs, BCM2838GenetState, + BCM2838_GENET_PHY_AUX_CTL_REGS_SIZE), + VMSTATE_UINT16_2DARRAY(phy_exp_shd_regs.regs, BCM2838GenetState, + BCM2838_GENET_PHY_EXP_SHD_BLOCKS_CNT, + BCM2838_GENET_PHY_EXP_SHD_REGS_CNT), + VMSTATE_END_OF_LIST() + } +}; + static void bcm2838_genet_class_init(ObjectClass *class, const void *data) { static ResettablePhases unused_parent_phases; @@ -1142,6 +1164,7 @@ static void bcm2838_genet_class_init(ObjectClass *class, const void *data) ResettableClass *rc = RESETTABLE_CLASS(class); dc->realize = bcm2838_genet_realize; + dc->vmsd = &vmstate_bcm2838_genet; resettable_class_set_parent_phases(rc, NULL, bcm2838_genet_reset, NULL, &unused_parent_phases); device_class_set_props(dc, genet_properties); diff --git a/include/hw/net/bcm2838_genet.h b/include/hw/net/bcm2838_genet.h index 87a59941ec..2420711a29 100644 --- a/include/hw/net/bcm2838_genet.h +++ b/include/hw/net/bcm2838_genet.h @@ -409,9 +409,25 @@ struct BCM2838GenetState { MemoryRegion regs_mr; AddressSpace dma_as; - BCM2838GenetRegs regs; - BCM2838GenetPhyRegs phy_regs; - BCM2838GenetPhyShdRegs phy_shd_regs; + /* + * The register blocks are named structs that contain nothing but + * uint32_t (MAC) or uint16_t (PHY) fields. Overlay each with an array + * of the same element type so that the whole block can be migrated + * with a single VMSTATE_UINT32_ARRAY()/VMSTATE_UINT16_ARRAY(). + */ + union { + BCM2838GenetRegs regs; + uint32_t regs_u32[sizeof(BCM2838GenetRegs) / sizeof(uint32_t)]; + }; + union { + BCM2838GenetPhyRegs phy_regs; + uint16_t phy_regs_u16[sizeof(BCM2838GenetPhyRegs) / sizeof(uint16_t)]; + }; + union { + BCM2838GenetPhyShdRegs phy_shd_regs; + uint16_t phy_shd_regs_u16[sizeof(BCM2838GenetPhyShdRegs) + / sizeof(uint16_t)]; + }; BCM2838GenetPhyAuxShdRegs phy_aux_ctl_shd_regs; BCM2838GenetPhyExpShdRegs phy_exp_shd_regs; -- 2.55.0