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Tue, 27 Oct 2026 15:57:53 +0000 (UTC) From: Mohamed Mediouni To: qemu-devel@nongnu.org Cc: qemu-arm@nongnu.org, Pedro Barbuda , Pierrick Bouvier , Peter Maydell , Mohamed Mediouni , "Doug Cook (WINDOWS)" Subject: [PATCH v2 09/18] target/i386/whpx: handle processor reset Date: Tue, 27 Oct 2026 16:57:28 +0100 Message-ID: <20261027155737.59271-10-mohamed@unpredictable.fr> X-Mailer: git-send-email 2.54.0 In-Reply-To: <20261027155737.59271-1-mohamed@unpredictable.fr> References: <20261027155737.59271-1-mohamed@unpredictable.fr> X-Archived-By: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Proofpoint-GUID: kmC81Wva6BSvEoqy6qB-IMJOILSJK24o X-Proofpoint-ORIG-GUID: kmC81Wva6BSvEoqy6qB-IMJOILSJK24o X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYxMDI3MDA2MyBTYWx0ZWRfXyBwwIRILdNty GueiWfjTAw9n1aM89sS2xmeLN3pvc+GWA+IqUh7GeEhEgW5p6cG0u/OFgRm6na0etgi4zbjja1I Tcyq13kiAlH54+UHJl3h6oUwcudWu9tzEt8l2GyEYQBu/OvZ43pazVjT3E297WkXpgA7IdMmezc oROzqJt4kFU2VUpO9UB5UcsNLzAeB+yydgfGVhPtmVi4cKWV4HpVQm6XM6agpZ7rfUf7hYEgsiI sk8heE520W7kbKZQInoWz+hlpm0lgbB2vfBHkBQXZAsbTTcIsqNF+c+a1+OalIFPwdE8oWNMhnq GNrVwrS0tLaoIIFd3lu5K+w1pN8G6pk69IzcLHpwvakEZ+RjBGXzoMgtZYhlyQ= X-Authority-Info-Out: v=2.4 cv=Uutu9uwB c=1 sm=1 tr=0 ts=6ae0ca04 cx=c_apl:c_pps:t_out a=2G65uMN5HjSv0sBfM2Yj2w==:117 a=2G65uMN5HjSv0sBfM2Yj2w==:17 a=660iZSQnnn4A:10 a=VkNPw1HP01LnGYTKEx00:22 a=p0WdMEafAAAA:8 a=yMhMjlubAAAA:8 a=eqzMyDhjfWJDk1Qr7fMA:9 X-JNJ: AAAAAAABYJ9Sz6Q445CGz/B0r6FgN8mokGtOZOjvAt31zeKbfQ/5pOhEF59IsNNaE5b2+a8PAvOZw4aOSMU4IBx+NAm7qztBlR/vOIo+rtTK/ScgoJsL0gnvl6MXhfdsub9SfWLBZpGGzPFACnS3a+CO3uI7Xcihepf6mBRcGgEdDqx1EBMdpDuHFl95B4WniaPgwYdBg72FRK1+gMboIGAKJnirB997jlVAXj6I0cO2i7TfMbGlzgEEdBglsyyJYlr7AG98z8rJRrJEEplYdPCeDBvObedd8f9lkBvfZvKEA5kcy/yvbvUDHPGbDpmKUtf62ikzdpE7nap01d02r8lpqk02x7mG3/KnAzTx6zamlGimCD8g21EfBW7A5tCyjck7dviQuFSeQCxLpd130IJQGroXlF5Oj5s/x6mYdc3y14juIjZXeB6TwipHWHQF/k+Z1Fl1kvDZL+KszqnWnuWzGeSqFkjHMxVu/+2hlYlhw8QtPFVEYrsdM6pOWNsgX3JBgNcdpngHX3DzCZsHy8ZsqnK0URCHXHDhX/kLY645frS+QjzLQYXIlrqKdA3QI5Q6Ouzgw1gVU+OHT2yojSetQcDVNc/Q57f2dz0O+D9ajWzYufKpYgijjQYlyEenU/YrhhuWbPWfiOuVhrbwy0aw5znF2ulKkYWPHMnMOUEa3ch2YQjknaMJYM0ooXzsCGlCH6vNI1oNnKTQFbeW017HEGee8LPwrAFzQbRH/w0Mu662xD5+mD4uXjb7ZpddykFSaEabHVchN68OwHaLszrv8X4KMCx289PVhhi4WJHzNUpFpn+Ok+0= Received-SPF: pass client-ip=2a01:b747:3005:206::60; envelope-from=mohamed@unpredictable.fr; helo=outbound.ci.icloud.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, SPF_HELO_PASS=-0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-arm@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Archive: List-Post: List-Help: List-Subscribe: , Sender: qemu-arm-bounces+qemu-arm=archiver.kernel.org@nongnu.org X-Spam-Status: No, score=-23.8 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_CR_TRAILER,INCLUDES_PATCH,MAILING_LIST_MULTI, MENTIONS_GIT_HOSTING,SPF_HELO_PASS,SPF_PASS,USER_AGENT_GIT autolearn=ham autolearn_force=no version=4.0.1 X-Spam-Checker-Version: SpamAssassin 4.0.1 (2024-03-26) on aws-us-west-2-korg-listserv-alma10-1 From: "Doug Cook (WINDOWS)" WHPX is not properly handling processor reset: - Does not reset partition, so several registers (e.g. Hypercall, GuestOsId) carry values forward as "Locked" into the next session. - Does not clear hypervisor-managed TSC deadline (live-lock). - Does not re-arm the wait-for-SIPI trigger, so all CPUs start running immediately after reset. Some firmware may tolerate this, but OVMF does not. Typical result is that boot hangs or ends in triple-fault, e.g. qemu-system-x86_64: WHPX: Unexpected VP exit code 4 After this patch, I am able to boot to Windows desktop, reset, and boot back to Windows desktop. Tried many times in sequence with no problems. Used several different reset mechanisms (OS shutdown menu, external "reset", watchdog reset) with no problems. Resolves: https://gitlab.com/qemu-project/qemu/-/work_items/2402 Signed-off-by: Doug Cook Reviewed-by: Mohamed Mediouni --- target/i386/whpx/whpx-all.c | 29 +++++++++++++++++++++++++++++ 1 file changed, 29 insertions(+) diff --git a/target/i386/whpx/whpx-all.c b/target/i386/whpx/whpx-all.c index 29a630b03c..6b00724ceb 100644 --- a/target/i386/whpx/whpx-all.c +++ b/target/i386/whpx/whpx-all.c @@ -541,6 +541,35 @@ void whpx_set_registers(CPUState *cpu, WHPXStateLevel level) assert(cpu_is_stopped(cpu) || qemu_cpu_is_self(cpu)); + /* Assumes that cpu_synchronize_all_post_reset() runs cpu 0 first. */ + if (level == WHPX_LEVEL_RESET_STATE && cpu->cpu_index == 0) { + hr = whp_dispatch.WHvResetPartition(whpx->partition); + if (FAILED(hr)) { + error_report("WHPX: Failed to reset partition, hr=%08lx", hr); + } + } + + /* Reset hypervisor-owned TSC deadline. */ + if (level == WHPX_LEVEL_RESET_STATE) { + WHV_REGISTER_VALUE tsc_deadline = {}; + + whpx_set_reg(cpu, WHvX64RegisterTscDeadline, tsc_deadline); + } + + /* + * Re-arm partition's wait-for-SIPI state. + * whpx_vcpu_run() ignores cpu->halted, depends on SIPI for this. + * This must follow WHvResetPartition. + */ + if (level == WHPX_LEVEL_RESET_STATE && whpx_irqchip_in_kernel()) { + WHV_REGISTER_VALUE activity = {}; + + whpx_get_reg(cpu, WHvRegisterInternalActivityState, &activity); + activity.InternalActivity.StartupSuspend = !cpu_is_bsp(x86_cpu); + activity.InternalActivity.HaltSuspend = 0; + whpx_set_reg(cpu, WHvRegisterInternalActivityState, activity); + } + /* * Following MSRs have side effects on the guest or are too heavy for * runtime. Limit them to full state update. -- 2.54.0 (Apple Git-157)