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Tue, 27 Oct 2026 15:57:41 +0000 (UTC) From: Mohamed Mediouni To: qemu-devel@nongnu.org Cc: qemu-arm@nongnu.org, Pedro Barbuda , Pierrick Bouvier , Peter Maydell , Mohamed Mediouni , Doug Cook Subject: [PATCH v2 01/18] target/i386/whpx: fix VMX capability MSR values Date: Tue, 27 Oct 2026 16:57:20 +0100 Message-ID: <20261027155737.59271-2-mohamed@unpredictable.fr> X-Mailer: git-send-email 2.54.0 In-Reply-To: <20261027155737.59271-1-mohamed@unpredictable.fr> References: <20261027155737.59271-1-mohamed@unpredictable.fr> X-Archived-By: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYxMDI3MDA2MyBTYWx0ZWRfX1wl1C239Le0g oZcfOM08xyV/zL/EyHGGdfoCxRj6Jbe4FWErP5/PTgcwhzjIme5gohiFtmOj/n6P419Vz1Wtgff Ihh0yphUOr0zbBkcZfx68Ymh6Q1j0g1muNlDONXulzCXEjuvNvyK0QwUWDIs/qsyTnBBi7mp7bd Kx/NdEqC7zrdR1nyP805jujSF6WYaF7cqF66GpOgniEdvIqWyhEI9HsBt+y0EBzWwdC4voWbEWp uMT8aQWlCxGCUHJPfoRQIi326RgcXa1eGDfJzFAZNDT1BWFN0+Z67ClrFB+RH0iwgsl8ns3/dqU BeX11dlxzdnZyL+QmO+7k3qPoqioGkGAJCIZItHcQIA+1BtvtH35jYIWhhoK2Y= X-Authority-Info-Out: v=2.4 cv=L74QguT8 c=1 sm=1 tr=0 ts=6ae0c9f8 cx=c_apl:c_pps:t_out a=2G65uMN5HjSv0sBfM2Yj2w==:117 a=2G65uMN5HjSv0sBfM2Yj2w==:17 a=660iZSQnnn4A:10 a=VkNPw1HP01LnGYTKEx00:22 a=yMhMjlubAAAA:8 a=34rDk-nlojoYW5TMjDsA:9 X-Proofpoint-ORIG-GUID: KxsQUukQnCl1jKnMsTCYD68cPGkRnn3G X-Proofpoint-GUID: KxsQUukQnCl1jKnMsTCYD68cPGkRnn3G X-JNJ: AAAAAAABXklf954F+z/Q+PleBoOZ3VDwrq/L4kNSucVhTYNYE6k1RpTcRIC+9Pi8abQqY+jgWQMJxPJJxlOAl18xGtXDOICTjx8dDebkUi7yo7umH7eG2CImRIjYxH15dYp54cmLtj7KyX3tFo3a2g7HXxtun/1aTg2jy4WGiVuPr729CwEkdCS5Uop/lXe1DPZyHvLQnqOiKXVFVYXNkI4yPr1maB8EUfdDjyTodIYZiYnpEJQY28mMoaiTLCvQTchxkKewofGhiy6T5ie23Qbpu6jx0vZeyzhrUTxoBLHipbvphsHO5aAnygVKmRNcHlaW6PZE4hrvOsAb5S1iEzc7mNMAfptisqW/LY6wDv1rAGSehNPrEUY8h3N43QZufmBhHw9y+5cIuZtEE9Od8Rmmjr5M9l8LM2Jhn42v48f9rz2P0eDV2lPVf/hjnMcFDixAc6zUOCmS3Zben/tDLBx5gGDTWGxCbrEfuYTSQa4f6wx8B488O5a05Kwg5Xv1F/yH2FGzmInkt9UQQGn+Q28WDFTKC2SRBaA7FFG1DXOem3iv3XPY0dWROjUsWduDkSmh+vpwQsXt08b1CgYNMoJKm5TuVGcjeVZjA5BLDMC694CXIvJ4W6hTt8TiKT47Ec5xAImSo9h59vZB8FHcbvn80mg14xkNU60cly1imSmp8BjViWBYhUVzHDhizyp4y0uxd4sVwqsDkzXz26uulJ7PenyIONqqkSaZp7/0Wo87/sBKbFtZBqkc+Jl52KU1b9n+3w6Z7KWQgZ9vxWIP6t+7pslSuZDBbV/9KK6T+ConytkwMHw= Received-SPF: pass client-ip=2a01:b747:3005:206::39; envelope-from=mohamed@unpredictable.fr; helo=outbound.ci.icloud.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, SPF_HELO_PASS=-0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-arm@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Archive: List-Post: List-Help: List-Subscribe: , Sender: qemu-arm-bounces+qemu-arm=archiver.kernel.org@nongnu.org X-Spam-Status: No, score=-18.8 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_CR_TRAILER,INCLUDES_PATCH,MAILING_LIST_MULTI,SPF_HELO_PASS, SPF_PASS,USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=4.0.1 X-Spam-Checker-Version: SpamAssassin 4.0.1 (2024-03-26) on aws-us-west-2-korg-listserv-alma10-1 From: Doug Cook whpx_get_supported_msr_feature() had two bugs in how it reports the VMX control MSRs: - MSR_IA32_VMX_TRUE_PINBASED_CTLS and MSR_IA32_VMX_TRUE_PROCBASED_CTLS were queried using the non-TRUE capability codes (WHvCapabilityCodeVmxPinbasedCtls and WHvCapabilityCodeVmxProcbasedCtls). - For PROCBASED_CTLS2 and the four TRUE_* control MSRs, the raw allowed-0/allowed-1 pair was returned. The feature-word code expects only the bits that may be 1 but are not required to be 1. Apply the same transformation as kvm_arch_get_supported_msr_feature(); make_vmx_msr_value() adds the must-be-one bits back afterwards. As a result, with +vmx QEMU treated many VMX features the host does support (secondary controls, EPT, VPID, MSR bitmaps, ...) as missing, warned about each of them, and dropped them from the CPU model. The guest itself reads the VMX MSRs from the hypervisor, not from QEMU, so this did not change what the guest saw. Signed-off-by: Doug Cook Reviewed-by: Mohamed Mediouni --- target/i386/whpx/whpx-all.c | 29 +++++++++++++++++++++++++++-- 1 file changed, 27 insertions(+), 2 deletions(-) diff --git a/target/i386/whpx/whpx-all.c b/target/i386/whpx/whpx-all.c index 113f79afb9..1386affa9c 100644 --- a/target/i386/whpx/whpx-all.c +++ b/target/i386/whpx/whpx-all.c @@ -1452,10 +1452,10 @@ uint64_t whpx_get_supported_msr_feature(uint32_t index) cap = WHvCapabilityCodeVmxEptVpidCap; break; case MSR_IA32_VMX_TRUE_PINBASED_CTLS: - cap = WHvCapabilityCodeVmxPinbasedCtls; + cap = WHvCapabilityCodeVmxTruePinbasedCtls; break; case MSR_IA32_VMX_TRUE_PROCBASED_CTLS: - cap = WHvCapabilityCodeVmxProcbasedCtls; + cap = WHvCapabilityCodeVmxTrueProcbasedCtls; break; case MSR_IA32_VMX_TRUE_ENTRY_CTLS: cap = WHvCapabilityCodeVmxTrueEntryCtls; @@ -1474,6 +1474,31 @@ uint64_t whpx_get_supported_msr_feature(uint32_t index) if (FAILED(hr)) { return 0; } + + switch (index) { + case MSR_IA32_VMX_PROCBASED_CTLS2: + case MSR_IA32_VMX_TRUE_PINBASED_CTLS: + case MSR_IA32_VMX_TRUE_PROCBASED_CTLS: + case MSR_IA32_VMX_TRUE_ENTRY_CTLS: + case MSR_IA32_VMX_TRUE_EXIT_CTLS: { + /* + * These MSRs hold the allowed-0 settings in the low half and the + * allowed-1 settings in the high half. QEMU's feature words want + * only the bits that can be one but do not have to be one, so + * apply the same transformation as + * kvm_arch_get_supported_msr_feature(); make_vmx_msr_value() + * restores the must-be-one bits later. + */ + uint32_t must_be_one = (uint32_t)val; + uint32_t can_be_one = (uint32_t)(val >> 32); + + val = can_be_one & ~must_be_one; + break; + } + default: + break; + } + return val; } return 0; -- 2.54.0 (Apple Git-157)