[PATCH v2 0/2] ppc/spapr: Fix MSI-X shadow and BAR mmap handling during EEH PE reset

[Narayana Murty N <nnmlinux@linux.ibm.com>]

This series fixes two independent but related problems in the sPAPR EEH
PE reset path for VFIO pass-through devices.

Patch 1 fixes MSI-X interrupt delivery after EEH recovery.  The existing
pre-reset path calls msix_reset(), which clears QEMU's MSI-X table shadow.
On pSeries, this shadow is populated through:

    ibm,change-msi
        -> spapr_msi_setmsg()
        -> msix_set_message()

and is not necessarily rebuilt before the guest restores MSI-X after an
EEH reset.

Instead of resetting the MSI-X state, disable MSI-X by clearing only the
Enable bit using QEMU's cached PCI configuration value and dispatch the
write through pci_host_config_write_common().  This lets VFIO tear down
the active vectors and KVM irqfd routes through vfio_msix_disable() while
preserving the MSI-X shadow needed when the guest later re-enables MSI-X.

Patch 2 handles BAR mmap access while the PE is undergoing an EEH reset.
BAR mmap access is disabled before issuing the hot or fundamental PE
reset and restored only after VFIO_EEH_PE_CONFIGURE completes
successfully.  During this interval BAR accesses fall back to the VFIO
region read/write path.

Following review feedback, the BAR mmap and INTx mmap timer handling are
now encapsulated in VFIO PCI helpers instead of accessing
VFIOPCIDevice internals directly from the pSeries code.  The pre-reset
helper cancels a pending INTx mmap re-enable timer and disables the BAR
mmap path after interrupt teardown.  The post-configure helper restores
the normal mmap/INTx timer policy after successful PE configuration.

Without the fixes, EEH recovery itself reports success for the
passed-through BCM5719/tg3 device, but the interface does not recover its
link:
<snip>
    EEH: Beginning: 'resume'
    PCI 0001:00:01.0#0001: EEH: Invoking tg3->resume()
    PCI 0001:00:01.0#0001: EEH: tg3 driver reports: 'none'
    EEH: Finished:'resume'
    EEH: Recovery successful.
</snip>
<snip>
    # ethtool enP1p0s1 | grep Link
            Link detected: no
</snip>

With the series applied, EEH recovery completes and the link subsequently
comes back:

<snip>
    EEH: Beginning: 'resume'
    PCI 0001:00:01.0#0001: EEH: Invoking tg3->resume()
    PCI 0001:00:01.0#0001: EEH: tg3 driver reports: 'none'
    EEH: Finished:'resume'
    EEH: Recovery successful.
    tg3 0001:00:01.0 enP1p0s1: Link is up at 1000 Mbps, full duplex
    tg3 0001:00:01.0 enP1p0s1: Flow control is on for TX and on for RX
</snip>
<snip>
    # ethtool enP1p0s1 | grep Link
            Link detected: yes
</snip>

Signed-off-by: Narayana Murty N <nnmlinux@linux.ibm.com>
---
Change log:
v1:
- Move BAR mmap and INTx mmap timer handling into VFIO PCI helpers,
  as suggested by Mahesh.
- Avoid direct access to VFIOPCIDevice BAR and INTx internals from
  spapr_pci_vfio.c.
- Restore normal INTx mmap handling after successful PE configuration.
- Keep BAR mmap disabled when VFIO_EEH_PE_CONFIGURE fails.
- Keep the MSI-X shadow preservation behavior from patch 1 unchanged.
  v1: https://lore.kernel.org/qemu-devel/20260902114758.85160-1-nnmlinux@linux.ibm.com/

Narayana Murty N (2):
  ppc/spapr: Preserve VFIO MSI-X shadow across EEH reset
  ppc/spapr: Disable VFIO BAR mmap during EEH PE reset

 hw/ppc/spapr_pci_vfio.c | 102 ++++++++++++++++++++++++++++++++--------
 hw/vfio/pci.c           |  32 +++++++++++++
 hw/vfio/pci.h           |   2 +
 3 files changed, 116 insertions(+), 20 deletions(-)

-- 
2.54.0